mc68hc908kx8 Freescale Semiconductor, Inc, mc68hc908kx8 Datasheet - Page 31

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mc68hc908kx8

Manufacturer Part Number
mc68hc908kx8
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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2.4 Random-Access Memory (RAM)
Addresses $0040–$00FF are RAM locations. The location of the stack RAM is programmable. The 16-bit
stack pointer allows the stack to be anywhere in the 64-Kbyte memory space.
Before processing an interrupt, the CPU uses five bytes of the stack to save the contents of the CPU
registers.
During a subroutine call, the CPU uses two bytes of the stack to store the return address. The stack
pointer decrements during pushes and increments during pulls.
2.5 FLASH Memory (FLASH)
The FLASH memory is an array of 7,680 bytes with an additional 36 bytes of user vectors and one byte
used for block protection.
The program and erase operations are facilitated through control bits in the FLASH control register
(FLCR). See
The FLASH is organized internally as an 8192-word by 8-bit complementary metal-oxide semiconductor
(CMOS) page erase, byte (8-bit) program embedded FLASH memory. Each page consists of 64 bytes.
The page erase operation erases all words within a page. A page is composed of two adjacent rows.
A security feature prevents viewing of the FLASH contents.
2.6 FLASH Control Register
The FLASH control register (FLCR) controls FLASH program and erase operations.
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the FLASH difficult for
Freescale Semiconductor
unauthorized users.
2.6 FLASH Control
Address:
For correct operation, the stack pointer must point only to RAM locations.
For M6805, M146805 and M68HC05compatibility, the H register is not
stacked.
Be careful when using nested subroutines. The CPU could overwrite data
in the RAM during a subroutine or during the interrupt stacking operation.
An erased bit reads as 1 and a programmed bit reads as 0.
Reset:
Read:
Write:
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
$FE08
Bit 7
0
0
Figure 2-3. FLASH Control Register (FLCR)
= Unimplemented
Register.
6
0
0
5
0
0
NOTE
NOTE
NOTE
NOTE
4
0
0
HVEN
(1)
3
0
MASS
2
0
Random-Access Memory (RAM)
ERASE
1
0
PGM
Bit 0
0
31

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