pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 570

• Manufacturer Part Number: pnx1700
• Description: Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
Table 3: SPDI_CBITS1 Channel Status Meaning
PNX17XX_SER_1
Preliminary data sheet
SPDI_CBITS1[n]
0
1
2
3
4
5
6
7
8
9
10
11
IEC Consumer
Channel
Status Bit No.
0
1
2
3
4
5
6
7
8
9
10
11
3.2.6 SPDI_CBITSx and Channel Status Bits
The CAP_ENABLE and SAMP_MODE bits enable capture of audio data in a
particular format as described in
CHAN_MODE bits allow capture in either stereo (left/right sample pairs) or mono
(primary or secondary channel). The CHAN_MODE setting is independent of the
UCBITS_SEL setting.
The DIAG_MODE bit is used in conjunction with an SPDIF Out block. The
DIAG_MODE bit configures the SPDIF Input source to be the output pin of the SPDIF
Out block. Programmers must configure SPDIF Input and SPDIF Output modules
appropriately to use the loopback properly. The memory formats used while this bit is
enabled are unaffected. The only difference is that the source of the input stream is
internal rather that the external SPDIF Input pin.
The channel status block indicates the status of the currently received audio stream.
Its structure is different for each of the consumer or professional IEC60958 formats.
Within each 32-bit subframe is a channel status bit at location bit[30] in the 32-bit
word. The two ‘C’ bits, one for each of the subframes within a frame, can be different.
This can occur, for instance, while receiving a 2-channel stream.
SPDI_CBITS1..SPDI_CBITS6 hold channel status bits embedded in the source
SPDIF stream.
The SPDI_CBITSx registers are updated on a block basis. Upon the occurrence of
each new B preamble in the source stream, the SPDI_CBITSx registers are updated
with selected channel status information from the previous block. Programmers can
use the SPDI_CBITSx registers to determine the state of the SPDIF source material.
Information such as whether the stream is a consumer or professional type, sample
rate and sample size can be determined as well as other information. The
SPDI_CTL.UCBITS_SEL register determines which set (subframe 1 or 2) of 192
channel status bits will be captured. A selected set of the channel status bits captured
by the SPDI_CBITS registers are shown in
IEC Consumer
Meaning
Consumer mode
PCM/non-PCM data 1
Copyright
Format
Format
Format
Mode
Mode
Category code
Category code
Category code
Category code
Rev. 1 — 17 March 2006
AES/EBU
Professional
Channel Status
Bit No.
2
3
4
5
6
7
0
8
9
10
11
Table 6 on page 18-17
AES/EBU Professional Meaning
Professional mode
PCM/non-PCM data
Emphasis
Emphasis
Emphasis
Locked
Sample rate
Sample rate
Channel mode
Channel mode
Channel mode
Channel mode
Table 3
and
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Table
and
PNX17xx Series
Chapter 18: SPDIF Input
Section
4.
2.3.2. The
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