pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 308

• Manufacturer Part Number: pnx1700
• Description: Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
Table 17: GPIO Interrupt Registers for the FIFO Queues (One for each FIFO Queue)
PNX17XX_SER_1
Preliminary data sheet
Offset 0x10,4FA0+[4*<0-3>]
31:14
5:4
3
2
1
0
Offset 0x10,4FA4+[4*<0-3>]
31:4
3
2
1
0
Offset 0x10,4FA8+[4*<0-3>]
31:4
3
2
1
0
Offset 0x10,4FAC+[4*<0-3>]
31:4
Bit
Symbol
VALID_PTR
Reserved
INT_OE
FIFO_OE
BUF2_RDY
BUF1_RDY
Unused
INT_OE_EN
FIFO_OE_EN
BUF2_RDY_EN
BUF1_RDY_EN
Unused
INT_OE_CLR
FIFO_OE_CLR
BUF2_RDY_CLR
BUF1_RDY_CLR
Unused
4.11 GPIO Interrupt Registers for the FIFO Queues (One for each FIFO
Queue)
INT_STATUS<0-3>
INT_ENABLE<0-3>
INT_CLEAR<0-3>
INT_SET<0-3>
Acces
s
R
R
R
R
R
R
R/W
R/W
R/W
R/W
W
W
W
W
Value
0
0
0
0
0
0
-
0
0
0
0
-
0
0
0
0
-
Rev. 1 — 17 March 2006
Description
This field indicates how many valid 32-bit words of data have been
written by the GPIO module to the current DMA buffer:
When a BUFx_RDY signal occurs the address to read from can be
calculated using VALID_PTR. This field is only updated by the GPIO
after the relevant BUFx_RDY flag is cleared by software.
This field is valid in Signal Monitoring modes only.
Internal overrun error. Internal GPIO data buffer has overrun before
data has been written out to external DMA buffer. Data has been
lost.
ONLY USED in signal monitoring modes.
FIFO overrun error. A new, empty, DMA buffer was not supplied in
time.
ONLY USED in signal monitoring modes.
-In Signal Monitoring modes: DMA buffer 2 is ready to be read. It is
either full or an interval of silence has occurred.
-In Pattern Generation modes: All contents of DMA buffer 2 have
been read.
-In Signal Monitoring modes: DMA buffer1 is ready to be read. It is
either full or an interval of silence has occurred.
-In Pattern Generation modes: All contents of DMA buffer 1 have
been read.
Active high Internal overrun error interrupt enable for queue <0-3>.
Active high FIFO overrun error interrupt enable for queue <0-3>.
Active high Buffer 2 ready interrupt enable for queue <0-3>.
Active high Buffer 1 ready interrupt enable for queue <0-3>.
Active high internal overrun error interrupt clear for queue <0-3>.
Active high FIFO overrun error interrupt clear for queue <0-3>.
Active high Buffer 2 ready interrupt clear for queue <0-3>.
Active high Buffer 1 ready interrupt clear for queue <0-3>.
0x00000 - 1 32-bit word
0x00001 - 2 32-bit words
.....
0x3FFFF - 262143 32-bit words
Chapter 8: General Purpose Input Output Pins
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
8-37