pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 257

• Manufacturer Part Number: pnx1700
• Description: Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
Table 9: Registers Description
PNX17XX_SER_1
Preliminary data sheet
Bit
4
3:0
Offset 0x04 0830
31:28
27
26
25
24
23
22
21
20
19:18
17:16
15:8
7:0
Offset 0x04 0834
This register sets up the profile of the XIO select 3 line. All times are in reference to PCI clocks.
31:28
27
26
25
Symbol
gpxio_rd
gpxio_ben
Reserved
nand_2nd_cmd
nand_row_addr
nand_col_addr
nand_lb
Reserved
nand_128meg
nand_64meg
nand_inc_data
nand_cmd_ph
nand_adr_ph
command_b
command_a
Reserved
sel0_offset_ext
Reserved
sel0_siz_ext
NAND-Flash controls
XIO Sel3 Profile
Acces
s
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
Value
0
0
0
0
0
0
17
17
17
17
17
0
0
0
0
0
Rev. 1 — 17 March 2006
Description
1 = Read command on XIO
0 = Write command on XIO
Active low byte enables to be used on the indirect XIO cycle. These
are used to determine how many bytes to access and the lower two
address bits for use in “gpxio_addr”.
1 = When configured for 2 commands, place 2nd command after
last address phase and before any data.
0 = When configured for 2 commands, place 2nd command after
last data
1 = Include page addresses where nand_adr_ph determines
number of address phases to use.
0 = Do not include page address in NAND access.
1 = Include column address in NAND access
0 = Do not include column address in NAND access
1 = Use Large Block NAND address multiplexing rules
0 = Use Small Block NAND address multiplexing rules
1 = 128-MB device support;
0 = other than 128-MB device support
1 = 64-MB device support;
0 = other than 64-MB device support
1 = Include data in access cycle;
0 = access does not include data phase(s)
No. of commands to be used in NAND-Flash access.
10 = use command a at beginning of transaction and command b at
end of transaction.
01 = Use command a at beginning of transaction.
00 = Use no commands in transaction.
No. of address phases to be used in NAND-Flash access.
For 64-MB and 128-MB small block devices, 11 provide four
address phases and 10 provide three address phases.
This is the second command for NAND-Flash when two commands
are required to complete a cycle.
This is the command type to be used with NAND-Flash cycles when
one or more commands are required to complete a cycle.
Extension field to sel3_offset.
Extension field to sel3_siz.
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Chapter 7: PCI-XIO Module
PNX17xx Series
7-36