pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 158

• Manufacturer Part Number: pnx1700
• Description: Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
Table 1: PNX17xx Series Module and Bus Clocks
PNX17XX_SER_1
Preliminary data sheet
Bus or
Module
GPIO
SPDIO
FGPI
FGPO
Signal Name
clk_gpio_4q
clk_gpio_5q
clk_gpio_6q_12 GPIO FIFO clock/
clk_gpio_13
clk_gpio_14
clk_spdo
clk_spdi
clk_fgpi
clk_fgpo
2.2 Clock Sources for PNX17xx Series
Description
GPIO FIFO clock
GPIO FIFO clock
external clock
external clock
external clock
SPDO module
clock
SPDI module clock
All clocks in the PNX17xx Series clock system are generated from 5 possible
sources:
•
•
•
•
•
2 identical PLLs within the CAB block
1 separate PLL for the memory system called PLL2
high frequency dividers from the 1.728 GHz PLL in the CAB
the DDS blocks within the CAB
external clock inputs, or derived from input data streams
Frequencies
up to 108 MHz
up to 108 MHz
up to 108 MHz
up to 108 MHz
up to 108 MHz
up to 40 MHz
up to 108 MHz
up to 108 MHz
Rev. 1 — 17 March 2006
• 72 MHz
• 144 MHz
MMIO Clock Module Control
Register(s)
DDS8_CTL
DDS7_CTL
DDS6_CTL
DDS5_CTL
DDS2_CTL
DDS5_CTL
CLK_SPDO_CTL
CLK_SPDI_CTL
CLK_FGPI_CTL
CLK_FGPO_CTL
• DDS3_CTL
• or DDS8_CTL
• PLL1_CTL and
• or DDS2_CTL
DDS1_CTL
Chapter 5: The Clock Module
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
Standard
Clock Source
DDS8
DDS6
-
DDS5
1.728 GHz DIVIDERS
DDS8
DDS2
5-7