HW-SPAR3E-SK-UK-G Xilinx Inc, HW-SPAR3E-SK-UK-G Datasheet - Page 72

• Manufacturer Part Number: HW-SPAR3E-SK-UK-G
• Description: KIT STARTER SPARTAN-3E
• Manufacturer: Xilinx Inc

Specifications of HW-SPAR3E-SK-UK-G

• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Development Tool Type: Hardware / Software - Starter Kit
• Mcu Supported Families: Spartan-3E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: HW-SPAR3E-SK-US-UK-G; HW-SPAR3E-SK-US-UK-G

Chapter 9: Digital to Analog Converter (DAC)
Specifying the DAC Output Voltage
72
Spartan-3E
Master
FPGA
DAC Outputs A and B
DAC Outputs C and D
SPI_MISO
SPI_MOSI
DAC_CS
SPI_SCK
The FPGA first sends eight dummy or “don’t care” bits, followed by a 4-bit command. The
most commonly used command with the board is COMMAND[3:0] = “0011”, which
immediately updates the selected DAC output with the specified data value. Following the
command, the FPGA selects one or all the DAC output channels via a 4-bit address field.
Following the address field, the FPGA sends a 12-bit unsigned data value that the DAC
converts to an analog value on the selected output(s). Finally, four additional dummy or
don’t care bits pad the 32-bit command word.
As shown in
unsigned digital value, D[11:0], written by the FPGA to the DAC via the SPI interface.
The voltage on a specific output is generally described in
voltage, V
3.3V reference voltage and Channels C and D use a 2.5V reference. The reference voltages
themselves have a ±5% tolerance, so there will be slight corresponding variances in the
output voltage.
Equation 9-2
reference voltage associated with DAC outputs A and B is 3.3V ± 5%.
Equation 9-3
reference voltage associated with DAC outputs A and B is 2.5V ± 5%.
Figure 9-4: SPI Communications Protocol to LTC2624 DAC
Don’t Care
x x
0
REFERENCE
x x
Figure
provides the output voltage equation for DAC outputs A and B. The
provides the output voltage equation for DAC outputs A and B. The
0
lsb
1
9-2, each DAC output level is the analog equivalent of a 12-bit
2
, is different between the four DAC outputs. Channels A and B use a
V
V
V
OUT
OUTA
OUTC
3
12-bit Unsigned
4
www.xilinx.com
a
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
1 1 1 1
DATA
3
=
5
Slave: LTC2624 DAC
a
=
=
2
D 11:0
-------------------- -
6
4 096
a
D 11:0
-------------------- -
D 11:0
-------------------- -
[
,
4 096
4 096
1
7
[
[
,
,
a
0
8
ADDRESS
DAC A
DAC B
DAC C
DAC D
]
All
9 10
×
]
]
×
×
msb
V
11
(
(
REFERENCE
3.3V 5%
2.5V 5%
Spartan-3E FPGA Starter Kit Board User Guide
a
0
a
1
±
±
a
2
a
3
)
)
COMMAND
c
0
c
Equation
1
c
UG230 (v1.2) January 20, 2011
2
c
3
x x
9-1. The reference
Don’t Care
x x
x x
Equation 9-1
Equation 9-2
Equation 9-3
UG230_c9_04_021806
x x
3 1
R