HW-SPAR3E-SK-UK-G Xilinx Inc, HW-SPAR3E-SK-UK-G Datasheet - Page 121

KIT STARTER SPARTAN-3E

HW-SPAR3E-SK-UK-G

Manufacturer Part Number
HW-SPAR3E-SK-UK-G
Description
KIT STARTER SPARTAN-3E
Manufacturer
Xilinx Inc

Specifications of HW-SPAR3E-SK-UK-G

Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Development Tool Type
Hardware / Software - Starter Kit
Mcu Supported Families
Spartan-3E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
HW-SPAR3E-SK-US-UK-G
HW-SPAR3E-SK-US-UK-G

Available stocks

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Part Number:
HW-SPAR3E-SK-UK-G
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XILINX
0
Spartan-3E FPGA Starter Kit Board User Guide
UG230 (v1.2) January 20, 2011
UCF Location Constraints
R
Using Differential Outputs
Differential input signals do not require any special voltage. LVDS and RSDS differential
outputs signals, on the other hand, require a 2.5V supply on I/O Bank 0. The board
provides the option to power I/O Bank 0 with either 3.3V or 2.5V.
highlights the location of jumper JP9.
If using differential outputs on the FX2 connector, set jumper JP9 to 2.5V. If the jumper is
not set correctly, the outputs switch correctly but the signal levels are out of specification.
Figure 15-7
assignment and the I/O standard used, assuming that all connections use single-ended
I/O standards. These header connections are shared with the 6-pin accessory headers, as
shown in
Figure 15-5: Location of Termination Resistor Pads on Bottom Side of Board
Figure 15-11, page
provides the UCF constraints for the FX2 connector, including the I/O pin
www.xilinx.com
Figure 15-6: Differential Outputs
Signal
124.
FPGA
UG230_c12_05_022406
Hirose 100-pin FX2 Edge Connector (J3)
PAD
UG230_c12_06_022406
LxxN_0
LxxP_0
Figure 15-1, page 115
121

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