HW-SPAR3E-SK-UK-G Xilinx Inc, HW-SPAR3E-SK-UK-G Datasheet - Page 59

KIT STARTER SPARTAN-3E

HW-SPAR3E-SK-UK-G

Manufacturer Part Number
HW-SPAR3E-SK-UK-G
Description
KIT STARTER SPARTAN-3E
Manufacturer
Xilinx Inc

Specifications of HW-SPAR3E-SK-UK-G

Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Development Tool Type
Hardware / Software - Starter Kit
Mcu Supported Families
Spartan-3E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
HW-SPAR3E-SK-US-UK-G
HW-SPAR3E-SK-US-UK-G

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HW-SPAR3E-SK-UK-G
Manufacturer:
XILINX
0
UCF Location Constraints
Related Resources
Spartan-3E FPGA Starter Kit Board User Guide
UG230 (v1.2) January 20, 2011
R
Figure 6-4
assignment, the I/O standard used, the output slew rate, and the output drive current.
VESA
http://www.vesa.org
VGA timing information
http://www.epanorama.net/documents/pc/vga_timing.html
NET
NET
NET
NET
NET
"VGA_VSYNC"
"VGA_RED"
"VGA_GREEN"
"VGA_BLUE"
"VGA_HSYNC"
provides the UCF constraints for the VGA display port, including the I/O pin
Figure 6-4: UCF Constraints for VGA Display Port
LOC
LOC
LOC
LOC
LOC
www.xilinx.com
= "H14" |
= "H15" |
= "G15" |
= "F15" |
= "F14" |
IOSTANDARD
IOSTANDARD
IOSTANDARD
IOSTANDARD
IOSTANDARD
= LVTTL |
= LVTTL |
= LVTTL |
= LVTTL |
= LVTTL |
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
UCF Location Constraints
= 8 |
= 8 |
= 8 |
= 8 |
= 8 |
SLEW
SLEW
SLEW
SLEW
SLEW
= FAST ;
= FAST ;
= FAST ;
= FAST ;
= FAST ;
59

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