C8051F700DK Silicon Laboratories Inc, C8051F700DK Datasheet - Page 28
C8051F700DK
Manufacturer Part Number
C8051F700DK
Description
DEV KIT FOR C8051F700
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets
1.C8051F700-TB.pdf
(1 pages)
2.C8051F700-TB.pdf
(306 pages)
3.C8051F700-TB.pdf
(18 pages)
Specifications of C8051F700DK
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
C8051F7x
Processor Series
C8051F7xx
Interface Type
USB
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F7xx
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1635
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- Download datasheet (2Mb)
C8051F70x/71x
3. Pin Definitions
28
XTAL1
XTAL2
AGND
Name TQFP64 TQFP48
C2CK
VREF
RST /
P0.0 /
P0.2 /
P0.3 /
P0.1/
GND
P0.4
P0.5
P0.6
C2D
V
DD
41, 57
40, 56
8, 24,
9, 25,
58
59
55
54
53
52
51
50
49
8, 20, 44
QFN48
30, 43
9, 21,
45
46
42
41
40
39
38
37
36
Table 3.1. Pin Definitions for the C8051F70x/71x
QFN32 QFN24
Center
27
28
29
26
25
24
—
—
—
—
21
20
22
23
—
—
—
—
19
18
—
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
D I/O or
A I/O or
Rev. 1.0
D I/O
D I/O
D I/O
Type
A In
A In
A In
A In
A In
A In
D In
A In
A In
A In
Power Supply Voltage.
Ground.
Device Reset. Open-drain output of internal
POR or V
Clock signal for the C2 Debug Interface.
Bi-directional data signal for the C2 Debug
Interface.
Port 0.0.
ADC0 Input.
External VREF input.
Port 0.1.
ADC0 Input.
External AGND input.
Port 0.2.
ADC0 Input.
External Clock Pin. This pin can be used for
crystal clock mode.
Port 0.3.
ADC0 Input.
External Clock Pin. This pin can be used for
RC, crystal, and CMOS clock modes.
Port 0.4.
ADC0 Input.
Port 0.5.
ADC0 Input.
Port 0.6.
ADC0 Input.
DD
monitor.
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