C8051F700DK Silicon Laboratories Inc, C8051F700DK Datasheet - Page 17

• Manufacturer Part Number: C8051F700DK
• Description: DEV KIT FOR C8051F700
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F700DK

• Contents: Board, Cables, CD, Debugger, Power Supply
• Processor To Be Evaluated: C8051F7x
• Processor Series: C8051F7xx
• Interface Type: USB
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F7xx
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1635

1. System Overview
C8051F70x/71x devices are fully integrated, system-on-a-chip, capacitive sensing mixed-signal MCUs.
Highlighted features are listed below. Refer to Table 2.1 for specific product feature selection and part
ordering numbers.
With on-chip power-on reset, V
devices are truly stand-alone, system-on-a-chip solutions. The Flash memory can be reprogrammed even
in-circuit, providing non-volatile data storage, and also allowing field upgrades of the 8051 firmware. User
software has complete control of all peripherals, and may individually shut down any or all peripherals for
power savings.
The C8051F70x/71x processors include Silicon Laboratories’ 2-Wire C2 Debug and Programming inter-
face, which allows non-intrusive (uses no on-chip resources), full speed, in-circuit debugging using the pro-
duction MCU installed in the final application. This debug logic supports inspection of memory, viewing and
modification of special function registers, setting breakpoints, single stepping, and run and halt commands.
All analog and digital peripherals are fully functional while debugging using C2. The two C2 interface pins
can be shared with user functions, allowing in-system debugging without occupying package pins.
Each device is specified for 1.8–3.6 V operation over the industrial temperature range (–45 to +85 °C). An
internal LDO is used to supply the processor core voltage at 1.8 V. The Port I/O and RST pins are tolerant
of input signals up to 2 V above the V
information. Block diagrams of the devices in the C8051F70x/71x family are shown in Figure 1.1.
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High-speed pipelined 8051-compatible microcontroller core (up to 25 MIPS)
In-system, full-speed, non-intrusive debug interface (on-chip)
Capacitive Sense interface with 38 input channels
10-bit 500 ksps single-ended ADC with 16 external channels and integrated temperature sensor
Precision calibrated 24.5 MHz internal oscillator
16 kB of on-chip Flash memory
512 bytes of on-chip RAM
SMBus/I
Four general-purpose 16-bit timers
Programmable Counter/Timer Array (PCA) with three capture/compare modules
On-chip internal voltage reference
On-chip Watchdog timer
On-chip Power-On Reset and Supply Monitor
On-chip Voltage Comparator
54 general purpose I/O
2
C, Enhanced UART, and Enhanced SPI serial interfaces implemented in hardware
DD
monitor, watchdog timer, and clock oscillator, the C8051F70x/71x
DD
supply, with the exception of P0.3. See Table 2.1 for ordering
Rev. 1.0
C8051F70x/71x
17