C8051F700DK Silicon Laboratories Inc, C8051F700DK Datasheet - Page 195

DEV KIT FOR C8051F700

C8051F700DK

Manufacturer Part Number
C8051F700DK
Description
DEV KIT FOR C8051F700
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F700DK

Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
C8051F7x
Processor Series
C8051F7xx
Interface Type
USB
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F7xx
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1635
SFR Definition 28.7. P0: Port 0
SFR Address = 0x80; SFR Page = All Pages; Bit Addressable
SFR Definition 28.8. P0MDIN: Port 0 Input Mode
SFR Address = 0xF1; SFR Page = F
Name
Reset
Name
Reset
Bit
7:0
Bit
7:0
Type
Type
Bit
Bit
P0MDIN[7:0]
P0[7:0]
Name
Name
7
1
7
1
Port 0 Data.
Sets the Port latch logic
value or reads the Port pin
logic state in Port cells con-
figured for digital I/O.
Analog Configuration Bits for P0.7–P0.0 (respectively).
Port pins configured for analog mode have their weak pullup, digital driver, and
digital receiver disabled.
0: Corresponding P0.n pin is configured for analog mode.
1: Corresponding P0.n pin is not configured for analog mode.
6
6
1
1
Description
5
1
5
1
Rev. 1.0
0: Set output latch to logic
LOW.
1: Set output latch to logic
HIGH.
4
1
4
1
P0MDIN[7:0]
P0[7:0]
R/W
R/W
Function
Write
3
1
3
1
C8051F70x/71x
2
1
2
1
0: P0.n Port pin is logic
LOW.
1: P0.n Port pin is logic
HIGH.
1
1
1
1
Read
0
1
0
1
195

Related parts for C8051F700DK