TMP86C909XB Toshiba, TMP86C909XB Datasheet - Page 86

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TMP86C909XB

Manufacturer Part Number
TMP86C909XB
Description
EMULATION CHIP FOR TMP86F SDIP
Manufacturer
Toshiba
Datasheet

Specifications of TMP86C909XB

Accessory Type
Adapter
For Use With/related Products
TMP86F SDIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
TC1 pin input
Internal clock
Counter
TC1DRA
INTTC1
interrput request
TC1 pin input
Internal clock
Counter
TC1DRA
INTTC1
interrput request
8.3.4 Window Mode
of the input pulse to the TC1 pin (window pulse) and the internal source clock. Either the positive logic (count
up during high-going pulse) or negative logic (count up during low-going pulse) can be selected.
and the up-counter is cleared.
grammed with TC1CR<TC1CK>.
In the window mode, the up-counter counts up at the rising edge of the pulse that is logical ANDed product
When a match between the up-counter and the TC1DRA value is detected, an INTTC1 interrupt is generated
Define the window pulse to the frequency which is sufficiently lower than the internal source clock pro-
?
?
Timer start
Timer start
7
9
0
Figure 8-5 Window Mode Timing Chart
Count start
Count start
1
0
2
1
(a)
(b)
3
2
Positive logic
Page 75
Negative logic
4
3
Count stop
4
(TC1S = 10)
(TC1S = 11)
5
5
Count stop
Match detect
Count start
6
6
7
Count start
0
Counter clear
Match detect
1
7
8
2
TMP86F409NG
3
9 0
1
Counter
clear

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