TMP86C909XB Toshiba, TMP86C909XB Datasheet - Page 25

• Manufacturer Part Number: TMP86C909XB
• Description: EMULATION CHIP FOR TMP86F SDIP
• Manufacturer: Toshiba

Specifications of TMP86C909XB

• Accessory Type: Adapter
• For Use With/related Products: TMP86F SDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.2 System Clock Controller
(a) Single-clock mode
(b) Dual-clock mode
Note 1: NORMAL1 and NORMAL2 modes are generically called NORMAL; SLOW1 and SLOW2 are called SLOW; IDLE0, IDLE1
Note 2: The mode is released by falling edge of TBTCR<TBTCK> setting.
Table 2-1 Operating Mode and Conditions
Single clock
Dual clock
Operating Mode
and IDLE2 are called IDLE; SLEEP0, SLEEP1 and SLEEP2 are called SLEEP.
SLEEP2
SLEEP1
IDLE1
IDLE2
mode
mode
mode
mode
RESET
NORMAL1
IDLE1
IDLE0
STOP
NORMAL2
IDLE2
SLOW2
SLEEP2
SLOW1
SLEEP1
SLEEP0
STOP
Figure 2-6 Operating Mode Transition Diagram
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
SYSCR2<TGHALT> = "1"
Frequency
Oscillation
Oscillation
SYSCR2<IDLE> = "1"
SYSCR2<SYSCK> = "0"
High
Stop
Stop
SYSCR2<XTEN> = "0"
SYSCR2<XEN> = "1"
Oscillator
Interrupt
Interrupt
Interrupt
Interrupt
Frequency
Oscillation
Stop
Stop
Low
Note 2
Page 14
high frequency
low frequency
low frequency
Operate with
Operate with
Operate with
CPU Core
Operate
NORMAL1
NORMAL2
Reset
SLEEP0
Halt
Halt
Halt
Halt
SLOW2
SLOW1
IDLE0
mode
mode
mode
mode
mode
mode
SYSCR2<XTEN> = "1"
SYSCR2<SYSCK> = "1"
SYSCR2<XEN> = "0"
Note 2
SYSCR2<TGHALT> = "1"
Operate
Operate
Reset
SYSCR1<STOP> = "1"
TBT
Halt
Halt
SYSCR1<STOP> = "1"
SYSCR1<STOP> = "1"
STOP pin input
STOP pin input
STOP pin input
Peripherals
Operate
Operate
Other
Reset
Halt
Halt
Reset release
Machine Cycle
4/fc [s]
4/fc [s]
4/fs [s]
Time
–
–
TMP86F409NG
RESET
STOP