TMP86C909XB Toshiba, TMP86C909XB Datasheet - Page 8

• Manufacturer Part Number: TMP86C909XB
• Description: EMULATION CHIP FOR TMP86F SDIP
• Manufacturer: Toshiba

Specifications of TMP86C909XB

• Accessory Type: Adapter
• For Use With/related Products: TMP86F SDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9. 8-Bit TimerCounter (TC3, TC4)
10. Asynchronous Serial interface (UART )
11. Serial Expansion Interface (SEI)
9.1
9.2
9.3
10.1
10.2
10.3
10.4
10.5
10.6
10.7
10.8
10.9
11.1
11.2
11.3
11.4
8.3.5
8.3.6
9.3.1
9.3.2
9.3.3
9.3.4
9.3.5
9.3.6
9.3.7
9.3.8
9.3.9
10.8.1
10.8.2
10.9.1
10.9.2
10.9.3
10.9.4
10.9.5
10.9.6
11.2.1
11.2.2
11.2.3
11.3.1
11.3.2
11.4.1
Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
TimerCounter Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
9.3.9.1
9.3.9.2
11.2.1.1
Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Control
Transfer Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Transfer Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Data Sampling Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
STOP Bit Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Parity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Transmit/Receive Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Status Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
SEI Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
SEI Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
SEI Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Pulse Width Measurement Mode............................................................................................................ 76
Programmable Pulse Generate (PPG) Output Mode ............................................................................. 79
8-Bit Timer Mode (TC3 and 4) ................................................................................................................ 89
8-Bit Event Counter Mode (TC3, 4) ........................................................................................................ 90
8-Bit Programmable Divider Output (PDO) Mode (TC3, 4)..................................................................... 90
8-Bit Pulse Width Modulation (PWM) Output Mode (TC3, 4).................................................................. 93
16-Bit Timer Mode (TC3 and 4) .............................................................................................................. 95
16-Bit Event Counter Mode (TC3 and 4) ................................................................................................ 96
16-Bit Pulse Width Modulation (PWM) Output Mode (TC3 and 4).......................................................... 96
16-Bit Programmable Pulse Generate (PPG) Output Mode (TC3 and 4) ............................................... 99
Warm-Up Counter Mode....................................................................................................................... 101
Data Transmit Operation .................................................................................................................... 108
Data Receive Operation ..................................................................................................................... 108
Parity Error.......................................................................................................................................... 109
Framing Error...................................................................................................................................... 109
Overrun Error ...................................................................................................................................... 109
Receive Data Buffer Full..................................................................................................................... 110
Transmit Data Buffer Empty ............................................................................................................... 110
Transmit End Flag .............................................................................................................................. 111
SEI Control Register (SECR).............................................................................................................. 114
SEI Status Register (SESR) ............................................................................................................... 115
SEI Data Register (SEDR).................................................................................................................. 115
Controlling SEI clock polarity and phase ............................................................................................ 116
SEI data and clock timing ................................................................................................................... 116
SCLK pin............................................................................................................................................. 117
Low-Frequency Warm-up Counter Mode
High-Frequency Warm-Up Counter Mode
Transfer rate
(NORMAL1 → NORMAL2 → SLOW2 → SLOW1)
(SLOW1 → SLOW2 → NORMAL2 → NORMAL1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
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