TMP86C909XB Toshiba, TMP86C909XB Datasheet - Page 66

• Manufacturer Part Number: TMP86C909XB
• Description: EMULATION CHIP FOR TMP86F SDIP
• Manufacturer: Toshiba

Specifications of TMP86C909XB

• Accessory Type: Adapter
• For Use With/related Products: TMP86F SDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6. Time Base Timer (TBT)
6.1 Time Base Timer
Time Base Timer Control Register
6.1.1 Configuration
6.1.2 Control
timer interrupt (INTTBT).
(0036H)
TBTCR
The time base timer generates time base for key scanning, dynamic displaying, etc. It also provides a time base
Note 1: fc; High-frequency clock [Hz], fs; Low-frequency clock [Hz], *; Don't care
TBTEN
TBTCK
Time Base Timer is controled by Time Base Timer control register (TBTCR).
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
23
21
16
14
13
12
11
(DVOEN)
or fs/2
or fs/2
9
or fs/2
or fs/2
or fs/2
or fs/2
or fs/2
or fs/2
7
Time Base Timer
enable / disable
Time Base Timer interrupt
Frequency select : [Hz]
15
13
8
6
5
4
3
TBTCK
Time base timer control register
6
(DVOCK)
Figure 6-1 Time Base Timer configuration
MPX
3
TBTCR
5
Source clock
(DV7CK)
4
0: Disable
1: Enable
TBTEN
000
001
010
011
100
101
110
111
TBTEN
Falling edge
Page 55
3
detector
DV7CK = 0
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
NORMAL1/2, IDLE1/2 Mode
fc/2
2
23
21
16
14
13
12
11
9
TBTCK
1
DV7CK = 1
fs/2
fs/2
fs/2
fs/2
fs/2
fs/2
fs/2
fs/2
0
15
13
8
6
5
4
3
(Initial Value: 0000 0000)
release request
INTTBT
interrupt request
IDLE0, SLEEP0
SLEEP1/2
SLOW1/2
Mode
fs/2
fs/2
–
–
–
–
–
–
TMP86F409NG
15
13
R/W