S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 831

• Manufacturer Part Number: S912XEG128J2MAL
• Description: 16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
• Manufacturer: Freescale Semiconductor

Specifications of S912XEG128J2MAL

• Rohs: yes
• Core: RISC
• Processor Series: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 12 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-112
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 8
• Data Rom Size: 4 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• On-chip Dac: Yes
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

Chapter 24
128 KByte Flash Module (S12XFTM128K2V1)
Freescale Semiconductor
Revision
Number
V01.10
V01.11
V01.12
30 Nov 2007
19 Dec 2007
25 Sep 2009
Revision
Date
24.1.2.2/24-833
24.3.2.1/24-843
24.4.2.4/24-870
24.4.2.6/24-871
24.3.2.1/24-843
24.4.1.2/24-862
24.1.3/24-834
24.4.2/24-867
24.4.2/24-867
24.4.2/24-867
24.4.2/24-867
24.3.1/24-836
24.1.3/24-834
24.3.1/24-836
24.3.1/24-836
24.3.2/24-841
24.4.2.11/24-
24.4.2.11/24-
24.4.2.11/24-
24.4.2.19/24-
24.1/24-832
24.6/24-890
Sections
Affected
875
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MC9S12XE-Family Reference Manual Rev. 1.25
Table 24-1. Revision History
- Correction
- Removed Load Data Field command 0x05
- Updated Command Error Handling tables based on parent-child relationship
with FTM256K2
- Corrected Error Handling table for Full Partition D-Flash, Partition D-Flash,
and EEPROM Emulation Query commands
- Corrected maximum allowed ERPART for Full Partition D-Flash and Partition
D-Flash commands
- Corrected P-Flash IFR Accessibility table
- Corrected Buffer RAM size in Feature List
- Corrected EEE Resource Memory Map
- Changed D-Flash size from 16Kbytes to 32Kbytes
- Corrected P-Flash Memory Map
- Change references for D-Flash from 16 Kbytes to 32 Kbytes
- Clarify single bit fault correction for P-Flash phrase
- Expand FDIV vs OSCCLK Frequency table
- Add statement concerning code runaway when executing Read Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Program Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Verify Backdoor
Access Key command from Flash block containing associated fields
- Relate Key 0 to associated Backdoor Comparison Key address
- Change “power down reset” to “reset”
- Add ACCERR condition for Disable EEPROM Emulation command
The following changes were made to clarify module behavior related to Flash
register access during reset sequence and while Flash commands are active:
- Add caution concerning register writes while command is active
- Writes to FCLKDIV are allowed during reset sequence while CCIF is clear
- Add caution concerning register writes while command is active
- Writes to FCCOBIX, FCCOBHI, FCCOBLO registers are ignored during
reset sequence
toTable 24-6
Description of Changes
831