S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 188

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S912XEG128J2MAL

Manufacturer Part Number
S912XEG128J2MAL
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEG128J2MAL

Rohs
yes
Core
RISC
Processor Series
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
128 KB
Data Ram Size
12 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
8
Data Rom Size
4 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
On-chip Dac
Yes
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEG128J2MAL
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Chapter 3 Memory Mapping Control (S12XMMCV4)
3.1.1
3.1.2
The main features of this block are:
188
Unimplemented areas
Mis-aligned address
single-chip modes
Paging capability to support a global 8 Mbytes memory address space
Bus arbitration between the masters CPU, BDM and XGATE
external resource
expanded modes
emulation modes
Aligned address
External Space
global address
normal modes
special modes
Logic level “1”
Logic level “0”
local address
Bus Clock
Terminology
Features
MCU
NVM
word
PRR
PRU
byte
NS
SS
NX
ES
EX
ST
0x
x
Voltage that corresponds to Boolean true state
Voltage that corresponds to Boolean false state
Represents hexadecimal number
Represents logic level ’don’t care’
8-bit data
16-bit data
based on the 64 KBytes Memory Space (16-bit address)
based on the 8 MBytes Memory Space (23-bit address)
Address on even boundary
Address on odd boundary
System Clock. Refer to CRG Block Guide.
Normal Expanded Mode
Emulation Single-Chip Mode
Emulation Expanded Mode
Special Test Mode
Normal Single-Chip Mode
Special Single-Chip Mode
Emulation Single-Chip Mode
Emulation Expanded Mode
Normal Single-Chip Mode
Normal Expanded Mode
Special Single-Chip Mode
Special Test Mode
Normal Single-Chip Mode
Special Single-Chip Mode
Normal Expanded Mode
Emulation Single-Chip Mode
Emulation Expanded Mode
Special Test Mode
Areas which are accessible by the pages (RPAGE,PPAGE,EPAGE) and not implemented
Area which is accessible in the global address range 14_0000 to 3F_FFFF
Resources (Emulator, Application) connected to the MCU via the external bus on
expanded modes (Unimplemented areas and External Space)
Port Replacement Registers
Port Replacement Unit located on the emulator side
MicroController Unit
Non-volatile Memory; Flash EEPROM or ROM
MC9S12XE-Family Reference Manual Rev. 1.25
Table 3-2. Acronyms and Abbreviations
Freescale Semiconductor

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