S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 463

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S912XEG128J2MAL

Manufacturer Part Number
S912XEG128J2MAL
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEG128J2MAL

Rohs
yes
Core
RISC
Processor Series
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
128 KB
Data Ram Size
12 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
8
Data Rom Size
4 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
On-chip Dac
Yes
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEG128J2MAL
Manufacturer:
NXP/恩智浦
Quantity:
20 000
10.9
10.9.1
The recommended initialization of the XGATE is as follows:
The following code example implements the XGATE initialization sequence.
10.9.2
SCI_REGS
SCIBDH
SCIBDL
SCICR2
SCISR1
SCIDRL
TIE
TE
RE
Freescale Semiconductor
Arithmetic Immediate Instructions
1. Clear the XGE bit to suppress any incoming service requests.
2. Make sure that no thread is running on the XGATE. This can be done in several ways:
3. Set the XGVBR register to the lowest address of the XGATE vector space.
4. Clear all Channel ID flags.
5. Copy XGATE vectors and code into the RAM.
6. Initialize the S12X_INT module.
7. Enable the XGATE by setting the XGE bit.
SUBL RD, #IMM8
SUBH RD, #IMM8
CMPL RS, #IMM8
CPCH RS, #IMM8
ADDL RD, #IMM8
ADDH RD, #IMM8
LDL RD, #IMM8
LDH RD, #IMM8
a) Poll the XGCHID register until it reads $00. Also poll XGDBG and XGSWEF to make sure
b) Enter Debug Mode by setting the XGDBG bit. Clear the XGCHID register. Clear the XGDBG
The recommended method is a).
Initialization and Application Information
that the XGATE has not been stopped.
bit.
Initialization
Code Example (Transmit "Hello World!" on SCI)
Functionality
CPU
;###########################################
;#
;###########################################
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
Table 10-24. Instruction Set Summary (Sheet 3 of 3)
MC9S12XE-Family Reference Manual Rev. 1.25
S12X
$00C8
SCI_REGS+$00;
SCI_REGS+$00
SCI_REGS+$03
SCI_REGS+$04
SCI_REGS+$07
$80
$08
$04
15
1
1
1
1
1
1
1
1
14
1
1
1
1
1
1
1
1
13
0
0
0
0
1
1
1
1
SYMBOLS
;SCI register space
;SCI Baud Rate Register
;SCI Baud Rate Register
;SCI Control Register 2
;SCI Status
;SCI Control Register 2
;TIE bit mask
;TE bit mask
;RE bit mask
12
0
0
1
1
0
0
1
1
11
0
1
0
1
0
1
0
1
10
RD
RD
RD
RD
RD
RD
RS
RS
9
Register 1
8
7
#
6
Chapter 10 XGATE (S12XGATEV3)
5
4
IMM8
IMM8
IMM8
IMM8
IMM8
IMM8
IMM8
IMM8
3
2
1
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