S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 316

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S912XEG128J2MAL

Manufacturer Part Number
S912XEG128J2MAL
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEG128J2MAL

Rohs
yes
Core
RISC
Processor Series
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
128 KB
Data Ram Size
12 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
8
Data Rom Size
4 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
On-chip Dac
Yes
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEG128J2MAL
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Chapter 8 S12X Debug (S12XDBGV3) Module
8.3.2.6
Read: Anytime
Write: Never
316
Address: 0x0026
CNT[6:0]
Reset
Field
POR
6–0
W
R
1. This applies to Normal/Loop1/PurePC Modes when tracing from either CPU12X or XGATE only.
TBF (DBGSR)
Count Value — The CNT bits [6:0] indicate the number of valid data 64-bit data lines stored in the Trace Buffer.
Table 8-20
When the CNT rolls over to zero, the TBF bit in DBGSR is set and incrementing of CNT will continue in end-
trigger or mid-trigger mode. The DBGCNT register is cleared when ARM in DBGC1 is written to a one. The
DBGCNT register is cleared by power-on-reset initialization but is not cleared by other system resets. Thus
should a reset occur during a debug session, the DBGCNT register still indicates after the reset, the number of
valid trace buffer entries stored before the reset occurred. The DBGCNT register is not decremented when
reading from the trace buffer.
Debug Count Register (DBGCNT)
0
0
0
7
0
0
0
0
1
1
= Unimplemented or Reserved
shows the correlation between the CNT bits and the number of valid data lines in the Trace Buffer.
0
6
CNT[6:0]
0000000
0000001
0000010
0000100
0000110
1111100
1111110
0000000
0000010
1111110
Figure 8-8. Debug Count Register (DBGCNT)
..
..
..
MC9S12XE-Family Reference Manual Rev. 1.25
Table 8-19. DBGCNT Field Descriptions
Table 8-20. CNT Decoding Table
0
5
oldest data has been overwritten by most recent data
ARM bit will be cleared and the tracing session ends.
64 lines valid; if using Begin trigger alignment,
0
4
Description
32 bits of one line valid
CNT
64 lines valid,
No data valid
62 lines valid
63 lines valid
0
3
Description
2 lines valid
3 lines valid
1 line valid
..
0
2
(1)
Freescale Semiconductor
0
1
0
0

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