S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 236

• Manufacturer Part Number: S912XEG128J2MAL
• Description: 16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
• Manufacturer: Freescale Semiconductor

Specifications of S912XEG128J2MAL

• Rohs: yes
• Core: RISC
• Processor Series: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 12 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-112
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 8
• Data Rom Size: 4 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• On-chip Dac: Yes
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

Chapter 4 Memory Protection Unit (S12XMPUV1)
4.3.1.10
Read: Anytime
Write: Anytime
4.3.1.11
Read: Anytime
Write: Anytime
236
Address: Module Base + 0x000A
Address: Module Base + 0x000B
HIGH_ADDR[
HIGH_ADDR[
HIGH_ADDR[
Reset
Reset
22:19]
18:11]
Field
Field
Field
10:3]
NEX
3–0
7–0
7–0
6
W
W
R
R
MPU Descriptor Register 4 (MPUDESC4)
MPU Descriptor Register 5 (MPUDESC5)
No-Execute bit — The NEX bit prevents the described memory range from being used as code memory. If this
bit is set every Op-code fetch in this memory range causes an access violation.
Memory range upper boundary address bits — The HIGH_ADDR[22:19] bits represent bits [22:19] of the
global memory address that is used as the upper boundary for the described memory range.
Memory range upper boundary address bits — The HIGH_ADDR[18:11] bits represent bits [18:11] of the
global memory address that is used as the upper boundary for the described memory range.
Memory range upper boundary address bits — The HIGH_ADDR[10:3] bits represent bits [10:3] of the
global memory address that is used as the upper boundary for the described memory range.
1
1
7
7
1
1
6
6
Figure 4-12. MPU Descriptor Register 4 (MPUDESC4)
Figure 4-13. MPU Descriptor Register 5 (MPUDESC5)
MC9S12XE-Family Reference Manual Rev. 1.25
Table 4-12. MPUDESC4 Field Descriptions
Table 4-13. MPUDESC5 Field Descriptions
1
1
5
5
HIGH_ADDR[18:11]
HIGH_ADDR[10:3]
1
1
4
4
Description
Description
Description
1
1
3
3
1
1
2
2
Freescale Semiconductor
1
1
1
1
1
1
0
0