SSTUB32865ET/G,518 NXP Semiconductors, SSTUB32865ET/G,518 Datasheet - Page 5

• Manufacturer Part Number: SSTUB32865ET/G,518
• Description: IC REG BUFFER 28BIT 160TFBGA
• Manufacturer: NXP Semiconductors

Specifications of SSTUB32865ET/G,518

• Logic Type: 1:2 Registered Buffer with Parity
• Supply Voltage: 1.7 V ~ 2 V
• Number Of Bits: 28
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-TFBGA
• Logic Family: SSTU
• Logical Function: Reg Bfr W/ParityTst
• Number Of Elements: 1
• Number Of Inputs: 28
• Number Of Outputs: 56
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 2V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 450(Min)MHz
• Mounting: Surface Mount
• Pin Count: 160
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-3542-2; 935281691518; SSTUB32865ET/G-T

NXP Semiconductors
SSTUB32865_3
Product data sheet
Fig 3. Ball mapping
M
C
D
G
H
N
R
U
A
B
E
F
K
L
P
T
V
J
CSGATEEN
160-ball, 12
An empty cell indicates no ball is populated at that grid point.
n.c. denotes a no-connect (ball present but not connected to the die).
MCL denotes a pin that must be connected LOW.
MCH denotes a pin that must be connected HIGH.
RESET
DODT1
DCKE0
VREF
VREF
D11
D18
D17
D19
D13
D1
D3
D6
D7
CK
CK
D0
1
SELDR
DODT0
DCKE1
DCS0
DCS1
MCL
D12
D15
D14
D10
D16
D21
D20
D2
D4
D5
D8
D9
18 grid; top view.
2
PARIN
MCL
MCL
n.c.
3
PTYERR
VDDL
VDDL
VDDL
VDDL
DCS2
DCS3
VDDL
GND
GND
GND
GND
GND
n.c.
n.c.
n.c.
4
VDDL
VDDL
VDDL
VDDL
MCH
MCH
GND
GND
GND
GND
GND
GND
GND
GND
n.c.
n.c.
5
Rev. 03 — 27 March 2007
QCKE1A
QCKE1B
VDDL
VDDL
VDDL
Q3B
Q3A
n.c.
6
QCKE0A
QCKE0B
VDDR
VDDR
Q12B
Q12A
GND
n.c.
7
1.8 V DDR2-800 registered buffer with parity
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
Q21A
Q21B
GND
GND
GND
GND
GND
GND
Q7B
Q7A
8
VDDR
VDDR
VDDR
VDDR
VDDR
Q19A
Q19B
GND
GND
GND
GND
GND
GND
GND
Q4B
Q4A
9
SSTUB32865
Q18A
Q18B
Q13B
Q13A
10
QODT0B
QODT1B
QCS0B
QCS1B
Q17B
Q20B
Q16B
Q10B
Q11B
Q15B
Q14B
© NXP B.V. 2007. All rights reserved.
Q1B
Q2B
Q5B
Q6B
Q9B
Q0B
Q0A
11
QODT0A
QODT1A
QCS0A
QCS1A
002aac017
Q17A
Q20A
Q16A
Q10A
Q11A
Q15A
Q14A
Q1A
Q2A
Q5A
Q6A
Q9A
Q8B
Q8A
12
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