SSTUB32865ET/G,518 NXP Semiconductors, SSTUB32865ET/G,518 Datasheet - Page 28

IC REG BUFFER 28BIT 160TFBGA

SSTUB32865ET/G,518

Manufacturer Part Number
SSTUB32865ET/G,518
Description
IC REG BUFFER 28BIT 160TFBGA
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SSTUB32865ET/G,518

Logic Type
1:2 Registered Buffer with Parity
Supply Voltage
1.7 V ~ 2 V
Number Of Bits
28
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
160-TFBGA
Logic Family
SSTU
Logical Function
Reg Bfr W/ParityTst
Number Of Elements
1
Number Of Inputs
28
Number Of Outputs
56
High Level Output Current
-8mA
Low Level Output Current
8mA
Propagation Delay Time
3ns
Operating Supply Voltage (typ)
1.8V
Operating Supply Voltage (max)
2V
Operating Supply Voltage (min)
1.7V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Frequency (max)
450(Min)MHz
Mounting
Surface Mount
Pin Count
160
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-3542-2
935281691518
SSTUB32865ET/G-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SSTUB32865ET/G,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
18. Contents
1
2
3
4
4.1
5
6
6.1
6.2
7
7.1
7.2
7.3
7.3.1
7.3.2
7.3.3
7.3.4
8
9
10
11
11.1
11.2
11.3
12
13
13.1
13.2
13.3
13.4
14
15
16
16.1
16.2
16.3
16.4
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 8
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 15
Recommended operating conditions. . . . . . . 15
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 16
Test information . . . . . . . . . . . . . . . . . . . . . . . . 18
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 23
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 26
Legal information. . . . . . . . . . . . . . . . . . . . . . . 27
Contact information. . . . . . . . . . . . . . . . . . . . . 27
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Functional information . . . . . . . . . . . . . . . . . . . 9
Functional differences to SSTU32864 . . . . . . 10
Chip Select (CS) gating of key inputs
(DCS0, DCS1, DCS2, DCS3, CSGATEEN) . . 10
Parity error checking and reporting. . . . . . . . . 10
Reset (RESET) . . . . . . . . . . . . . . . . . . . . . . . . 10
Power-up sequence . . . . . . . . . . . . . . . . . . . . 11
Test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Output slew rate measurement. . . . . . . . . . . . 20
Error output load circuit and voltage
measurement . . . . . . . . . . . . . . . . . . . . . . . . . 21
Introduction to soldering . . . . . . . . . . . . . . . . . 24
Wave and reflow soldering . . . . . . . . . . . . . . . 24
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 24
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 25
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 27
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
1.8 V DDR2-800 registered buffer with parity
SSTUB32865
Document identifier: SSTUB32865_3
Date of release: 27 March 2007
All rights reserved.

Related parts for SSTUB32865ET/G,518