AM29BDD160G AMD [Advanced Micro Devices], AM29BDD160G Datasheet - Page 48

• Manufacturer Part Number: AM29BDD160G
• Description: 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
• Manufacturer: AMD [Advanced Micro Devices]

DYB = Dynamic Protection Bit
OW = Address (A5–A0) is (011X10). PPB = Persistent Pro-
PWA = Password Address. A0 selects between the low and
PWD = Password Data. Must be written over two cycles.
PL = Password Protection Mode Lock Address (A5–A0) is
RD(0) = Read Data DQ0 protection indicator bit. If pro-
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Shaded cells in table denote read cycles. All other cycles
4. During unlock cycles, (lower address bits are 555 or
5. The reset command returns the device to reading the ar-
6. The fourth cycle programs the addressed locking bit. The
46
SPMLB Status (5)
PPMLB Status (5)
DYB Status (12)
SPMLB Program
PPMLB Program
tection Bit
high 32-bit portions of the 64-bit Password
(001X10)
tected, DQ0= 1, if unprotected, DQ0 = 0.
are write operations.
2AAh as shown in table) address bits higher than A11
(except where BA is required) and data bits higher than
DQ7 are don’t cares.
ray.
fifth and sixth cycles are used to validate whether the bit
has been fully programmed. If DQ0 (in the sixth cycle)
reads 0, the program command must be issued and vil-
ified again.
(5, 6)
(5,6)
Table 20. Sector Protection Command Definitions (x32 Mode) (Sheet 2 of 2)
4
6
6
6
6
555
555
555
555
555
AA
AA
AA
AA
AA
2AA
2AA
2AA
2AA
2AA
55
55
55
55
55
Am29BDD160G
(BA)
555
555
555
555
555
RD(1) = Read Data DQ1 protection indicator bit. If pro-
7. Data is latched on the rising edge of WE#.
8. The entire four bus-cycle sequence must be entered for
9. The fourth cycle erases all PPBs. The fifth and sixth cy-
10. Before issuing the erase command, all PPBs should be
11. In the fourth cycle, 00h indicates PPB set; 01h indicates
12. The status of additional PPBs and DYBs may be read (fol-
58
60
60
60
60
tected, DQ1 = 1, if unprotected, DQ1 = 0.
SA = Sector Address where security command applies.
Address bits A18:A11 uniquely select any sector.
SL = Persistent Protection Mode Lock Address (A5–A0)
is (010X10)
WP = PPB Address (A5–A0) is (111X10)
X = Don’t care
PPMLB = Password Protection Mode Locking Bit
SPMLB = Persistent Protection Mode Locking Bit
each portion of the password.
cles are used to validate whether the bits have been fully
erased. If DQ0 (in the sixth cycle) reads 1, the erase
command must be issued and verified again.
programmed in order to prevent over-erasure of PPBs.
PPB not set.
lowing the fourth cycle) without reissuing the entire
command sequence.
SA
PL
PL
SL
SL
RD(0)
RD(0)
RD(0)
68
68
SL
PL
48
48
SL
PL
RD(0)
RD(0)