AM29BDD160G AMD [Advanced Micro Devices], AM29BDD160G Datasheet - Page 40

• Manufacturer Part Number: AM29BDD160G
• Description: 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
• Manufacturer: AMD [Advanced Micro Devices]

When the Sector Erase and Program Suspend com-
mand is written during a Sector Erase operation, the
chip will take between 0.1 µs and 20 µs to actually
suspend the operation and go into the erase sus-
pended read mode (pseudo-read mode), at which
time the user can read or program from a sector that
is not erase suspended. Reading data in this mode is
the same as reading from the standard read mode,
except that the data must be read from sectors that
have not been erase suspended.
Polling DQ6 on two immediately consecutive reads
from a given address provides the system with the
ability to determine if the device is in Erase or Pro-
gram Suspend. Before the device enters Erase or
Program Suspend, the DQ6 pin toggles between two
immediately consecutive reads from the same ad-
dress. After the device has entered Erase suspend,
DQ6 stops toggling between two immediately con-
secutive reads to the same address. During the
Sector Erase operation and also in Erase suspend
mode, two immediately consecutive readings from
the erase-suspended sector causes DQ2 to toggle.
DQ2 does not toggle if reading from a non-busy
(non-erasing) sector (stored data is read). No bits
are toggled during program suspend mode. Software
must keep track of the fact that the device is in a
suspended mode.
After entering the erase-suspend-read mode, the
system may read or program within any non-sus-
pended sector:
Sector Erase and Program Resume
Command
The Sector Erase and Program Resume command
(30h) resumes a Sector Erase or Program operation
that has been suspended. Any further writes of the
Sector Erase and Program Resume command ig-
nored. However, another Sector Erase and Program
Suspend command can be written after the device
has resumed sector erase operations. Note that until
a suspended program or erase operation has re-
sumed, the contents of that sector are unknown.
The Sector Erase and Program Resume Command is
ignored if the SecSi sector is enabled.
Configuration Register Read Command
The Configuration Register Read command is
used to verify the contents of the Configuration
38
A read operation from the erase-suspended bank
returns polling data during the first 8 µs after the
erase suspend command is issued; read opera-
tions thereafter return array data. Read opera-
tions from the other bank return array data with
no latency.
A program operation while in the erase suspend
mode is the same as programming in the regular
program mode, except that the data must be pro-
grammed to a sector that is not erase suspended.
Write operation status is obtained in the same
manner as a normal program operation.
Am29BDD160G
Register. Execution of this command is only al-
lowed while in user mode and is not available
during Unlock Bypass mode or during Security
mode. The Configuration Register Read com-
mand is preceded by the standard two-cycle
“unlock” sequence, followed by the Configura-
tion Register Read command (C6h), and finally
followed by performing a read operation to the
bank address specified when the C6h command
was written. Reading the other bank results in
reading the flash memory contents. The con-
tents of the Configuration Register are place on
DQ15–DQ0. If WORD# is at V
Bus), the contents of DQ31–DQ16 are XXXXh
and should be ignored. The user should execute
the Read/Reset command to place the device
back in standard user operation after executing
the Configuration Register Read command.
The Configuration Register Read Command is fully
operational if the SecSi sector is enabled.
Configuration Register Write Command
The Configuration Register Write command is
used to modify the contents of the Configura-
tion Register. Execution of this command is only
allowed while in user mode and is not available
during Unlock Bypass mode or during Security
mode. The Configuration Register Write com-
mand is preceded by the standard two-cycle
“unlock” sequence, followed by the Configura-
tion Register Write command (D0h), and finally
followed by writing the contents of the Configu-
ration Register to any address. The contents of
the Configuration Register are place on DQ15–
DQ0. If WORD# is at V
contents of DQ31–DQ16 are XXXXh and are ig-
nored. Writing the Configuration Register while
an Embedded Algorithm™ or Erase Suspend
modes are executing results in the contents of
the Configuration Register not being updated.
The Configuration Register Read Command is fully
operational if the SecSi sector is enabled.
Common Flash Interface (CFI) Command
The Common Flash Interface (CFI) command pro-
v i d e s d e v i c e s i z e , g e o m e t r y, a n d c a p a b i l i t y
information directly to the users system. Flash de-
vices that support CFI, have a “Query Command”
that returns information about the device to the sys-
tem. The Query structure contents are read at the
specific address locations following a single system
write cycle where:
Other device statistics may exist within a long se-
quence of commands or data input; such sequences
must first be completed or terminated before writing
of the 98H Query command, otherwise invalid Query
data structure output may result.
A 98h query command code is written to 55h ad-
dress location within the device’s address space
The device is initially in any valid read state, such
as “Read Array” or “Read ID Data”
IH
(32-bit DQ Bus), the
I H
(32-bit DQ