ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 93

• Manufacturer Part Number: ATMEga64L
• Description: 8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
• Manufacturer: ATMEL Corporation

Counter Unit
Output Compare Unit
2490G–AVR–03/04
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
Figure 35 shows a block diagram of the counter and its surrounding environment.
Figure 35. Counter Unit Block Diagram
Signal description (internal signals):
Depending on the mode of operation used, the counter is cleared, incremented, or dec-
remented at each timer clock (clk
clock source, selected by the Clock Select bits (CS02:0). When no clock source is
selected (CS02:0 = 0) the timer is stopped. However, the TCNT0 value can be accessed
by the CPU, regardless of whether clk
priority over) all counter clear or count operations.
The counting sequence is determined by the setting of the WGM01 and WGM00 bits
located in the Timer/Counter Control Register (TCCR0). There are close connections
between how the counter behaves (counts) and how waveforms are generated on the
Output Compare output OC0. For more details about advanced counting sequences
and waveform generation, see “Modes of Operation” on page 96.
The Timer/Counter Overflow Flag (TOV0) is set according to the mode of operation
selected by the WGM01:0 bits.
The 8-bit comparator continuously compares TCNT0 with the Output Compare Register
(OCR0). Whenever TCNT0 equals OCR0, the comparator signals a match. A match will
set the Output Compare Flag (OCF0) at the next timer clock cycle. If enabled (OCIE0 =
1), the Output Compare Flag generates an Output Compare interrupt. The OCF0 flag is
automatically cleared when the interrupt is executed. Alternatively, the OCF0 flag can
be cleared by software by writing a logical one to its I/O bit location. The Waveform Gen-
erator uses the match signal to generate an output according to operating mode set by
the WGM01:0 bits and Compare Output mode (COM01:0) bits. The max and bottom sig-
nals are used by the Waveform Generator for handling the special cases of the extreme
values in some modes of operation (“Modes of Operation” on page 96). Figure 36 shows
a block diagram of the Output Compare unit.
count
direction
clear
clk
top
bottom
T0
DATA BUS
TCNTn
Increment or decrement TCNT0 by 1.
Selects between increment and decrement.
Clear TCNT0 (set all bits to zero).
Timer/Counter clock.
Signalizes that TCNT0 has reached maximum value.
Signalizes that TCNT0 has reached minimum value (zero).
direction
count
clear
bottom
Control Logic
TOV0
T0
). clk
can be used for generating a CPU interrupt.
top
T0
T0
TOVn
(Int.Req.)
is present or not. A CPU write overrides (has
can be generated from an external or internal
clk
Tn
Prescaler
ATmega64(L)
Oscillator
T/C
clk
I/O
TOSC2
TOSC1
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