ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 175

• Manufacturer Part Number: ATMEga64L
• Description: 8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
• Manufacturer: ATMEL Corporation

Data Transmission – The
USART Transmitter
Sending Frames with 5 to 8
Data Bits
2490G–AVR–03/04
Note:
More advanced initialization routines can be made that include frame format as parame-
ters, disable interrupts and so on. However, many applications use a fixed setting of the
baud and control registers, and for these types of applications the initialization code can
be placed directly in the main routine, or be combined with initialization code for other
I/O modules.
The USART Transmitter is enabled by setting the Transmit Enable (TXEN) bit in the
UCSRB Register. When the Transmitter is enabled, the normal port operation of the
TxD pin is overridden by the USART and given the function as the transmitter’s serial
output. The baud rate, mode of operation and frame format must be set up once before
doing any transmissions. If synchronous operation is used, the clock on the XCK pin will
be overridden and used as transmission clock.
A data transmission is initiated by loading the transmit buffer with the data to be trans-
mitted. The CPU can load the transmit buffer by writing to the UDR I/O location. The
buffered data in the transmit buffer will be moved to the Shift Register when the Shift
Register is ready to send a new frame. The Shift Register is loaded with new data if it is
in idle state (no ongoing transmission) or immediately after the last stop bit of the previ-
ous frame is transmitted. When the Shift Register is loaded with new data, it will transfer
one complete frame at the rate given by the baud register, U2X bit or by XCK depending
on mode of operation.
Assembly Code Example
C Code Example
USART_Init:
void USART_Init( unsigned int baud )
{
}
; Set baud rate
out
out
; Enable receiver and transmitter
ldi
out
; Set frame format: 8data, 2stop bit
ldi
out
ret
/* Set baud rate */
UBRRH = (unsigned char)(baud>>8);
UBRRL = (unsigned char)baud;
/* Enable receiver and transmitter */
UCSRB = (1<<RXEN)|(1<<TXEN);
/* Set frame format: 8data, 2stop bit */
UCSRC = (1<<USBS)|(3<<UCSZ0);
1. The example code assumes that the part specific header file is included.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”,
and “SBI” instructions must be replaced with instructions that allow access to
extended I/O. Typically “LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and
“CBR”.
UBRRH, r17
UBRRL, r16
r16, (1<<RXEN)|(1<<TXEN)
UCSRB,r16
r16, (1<<USBS)|(3<<UCSZ0)
UCSRC,r16
(1)
(1)
ATmega64(L)
175