ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 216

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ATMEga64L

Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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Master Receiver Mode
216
ATmega64(L)
In the Master Receiver mode, a number of data bytes are received from a slave trans-
mitter (see Figure 98). In order to enter a Master mode, a START condition must be
transmitted. The format of the following address packet determines whether Master
Transmitter or Master Receiver mode is to be entered. If SLA+W is transmitted, MT
mode is entered, if SLA+R is transmitted, MR mode is entered. All the status codes
mentioned in this section assume that the prescaler bits are zero or are masked to zero.
Figure 98. Data Transfer in Master Receiver Mode
A START condition is sent by writing the following value to TWCR:
TWEN must be written to one to enable the Two-wire Serial Interface, TWSTA must be
written to one to transmit a START condition and TWINT must be set to clear the TWINT
flag. The TWI will then test the Two-wire Serial Bus and generate a START condition as
soon as the bus becomes free. After a START condition has been transmitted, the
TWINT flag is set by hardware, and the status code in TWSR will be 0x08 (see Table
88). In order to enter MR mode, SLA+R must be transmitted. This is done by writing
SLA+R to TWDR. Thereafter the TWINT bit should be cleared (by writing it to one) to
continue the transfer. This is accomplished by writing the following value to TWCR:
When SLA+R have been transmitted and an acknowledgment bit has been received,
TWINT is set again and a number of status codes in TWSR are possible. Possible sta-
tus codes in Master mode are 0x38, 0x40, or 0x48. The appropriate action to be taken
for each of these status codes is detailed in Table 89. Received data can be read from
the TWDR Register when the TWINT flag is set high by hardware. This scheme is
repeated until the last byte has been received. After the last byte has been received, the
MR should inform the ST by sending a NACK after the last received data byte. The
transfer is ended by generating a STOP condition or a repeated START condition. A
STOP condition is generated by writing the following value to TWCR:
A REPEATED START condition is generated by writing the following value to TWCR:
TWCR
Value
TWCR
Value
TWCR
Value
TWCR
Value
SDA
SCL
Device 1
RECEIVER
MASTER
TWINT
TWINT
TWINT
TWINT
1
1
1
1
TRANSMITTER
Device 2
TWEA
TWEA
TWEA
TWEA
SLAVE
X
X
X
X
TWSTA
TWSTA
TWSTA
TWSTA
1
0
0
1
Device 3
TWSTO
TWSTO
TWSTO
TWSTO
0
0
1
0
........
TWWC
TWWC
TWWC
TWWC
X
X
X
X
Device n
V
CC
TWEN
TWEN
TWEN
TWEN
1
1
1
1
R1
0
0
0
0
2490G–AVR–03/04
R2
TWIE
TWIE
TWIE
TWIE
X
X
X
X

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