ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 141

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ATMEga64L

Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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ATmega64(L)
• Bit 7:6 – Reserved Bits
These bits are reserved for future use. For ensuring compatibility with future devices,
these bits must be set to zero when ETIFR is written.
• Bit 5 – ICF3: Timer/Counter3, Input Capture Flag
This flag is set when a capture event occurs on the ICP3 pin. When the Input Capture
Register (ICR3) is set by the WGM3:0 to be used as the TOP value, the ICF3 flag is set
when the counter reaches the TOP value.
ICF3 is automatically cleared when the Input Capture 3 Interrupt Vector is executed.
Alternatively, ICF3 can be cleared by writing a logic one to its bit location.
• Bit 4 – OCF3A: Timer/Counter3, Output Compare A Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the Out-
put Compare Register A (OCR3A).
Note that a Forced Output Compare (FOC3A) strobe will not set the OCF3A flag.
OCF3A is automatically cleared when the Output Compare Match 3 A Interrupt Vector is
executed. Alternatively, OCF3A can be cleared by writing a logic one to its bit location.
• Bit 3 – OCF3B: Timer/Counter3, Output Compare B Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the Out-
put Compare Register B (OCR3B).
Note that a Forced Output Compare (FOC3B) strobe will not set the OCF3B flag.
OCF3B is automatically cleared when the Output Compare Match 3 B Interrupt Vector is
executed. Alternatively, OCF3B can be cleared by writing a logic one to its bit location.
• Bit 2 – TOV3: Timer/Counter3, Overflow Flag
The setting of this flag is dependent of the WGM3:0 bits setting. In Normal and CTC
modes, the TOV3 flag is set when the timer overflows. Refer to Table 52 on page 102
for the TOV3 flag behavior when using another WGM3:0 bit setting.
TOV3 is automatically cleared when the Timer/Counter3 Overflow Interrupt Vector is
executed. Alternatively, OCF3B can be cleared by writing a logic one to its bit location.
• Bit 1 – OCF3C: Timer/Counter3, Output Compare C Match Flag
This flag is set in the timer clock cycle after the counter (TCNT3) value matches the Out-
put Compare Register C (OCR3C).
Note that a Forced Output Compare (FOC3C) strobe will not set the OCF3C flag.
OCF3C is automatically cleared when the Output Compare Match 3 C Interrupt Vector is
executed. Alternatively, OCF3C can be cleared by writing a logic one to its bit location.
• Bit 0 – OCF1C: Timer/Counter1, Output Compare C Match Flag
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Out-
put Compare Register C (OCR1C).
Note that a Forced Output Compare (FOC1C) strobe will not set the OCF1C flag.
OCF1C is automatically cleared when the Output Compare Match 1 C Interrupt Vector is
executed. Alternatively, OCF1C can be cleared by writing a logic one to its bit location.
141
2490G–AVR–03/04

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