ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 69

• Manufacturer Part Number: ATMEga64L
• Description: 8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
• Manufacturer: ATMEL Corporation

Alternate Port Functions
2490G–AVR–03/04
Most port pins have alternate functions in addition to being general digital I/Os. Figure
33 shows how the port pin control signals from the simplified Figure 30 can be overrid-
den by alternate functions. The overriding signals may not be present in all port pins, but
the figure serves as a generic description applicable to all port pins in the AVR micro-
controller family.
Figure 33. Alternate Port Functions
Note:
Table 26 summarizes the function of the overriding signals. The pin and port indexes
from Figure 33 are not shown in the succeeding tables. The overriding signals are gen-
erated internally in the modules having the alternate function.
1. WPx, WDx, RLx, RPx, and RDx are common to all pins within the same port. clk
SLEEP, and PUD are common to all ports. All other signals are unique for each pin.
PUOExn:
PUOVxn:
DDOExn:
DDOVxn:
PVOExn:
PVOVxn:
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
SLEEP:
Pxn
Pxn PULL-UP OVERRIDE ENABLE
Pxn PULL-UP OVERRIDE VALUE
Pxn DATA DIRECTION OVERRIDE ENABLE
Pxn DATA DIRECTION OVERRIDE VALUE
Pxn PORT VALUE OVERRIDE ENABLE
Pxn PORT VALUE OVERRIDE VALUE
SLEEP CONTROL
1
0
1
0
1
0
1
0
(1)
PUOExn
PUOVxn
PVOExn
PVOVxn
DIEOExn
DIEOVxn
SLEEP
DDOExn
DDOVxn
PUD:
WDx:
RDx:
RRx:
WPx:
RPx:
clk
DIxn:
AIOxn:
SYNCHRONIZER
D
L
I/O
SET
CLR
:
Q
Q
PULLUP DISABLE
WRITE DDRx
READ DDRx
READ PORTx REGISTER
WRITE PORTx
READ PORTx PIN
I/O CLOCK
DIGITAL INPUT PIN n ON PORTx
ANALOG INPUT/OUTPUT PIN n ON PORTx
D
PINxn
CLR
Q
Q
RESET
RESET
PORTxn
Q
Q
Q
Q
DDxn
CLR
CLR
D
D
ATmega64(L)
clk
PUD
WDx
RDx
WPx
RRx
DIxn
AIOxn
RPx
I/O
69
I/O
,