FDC37B78X SMSC Corporation, FDC37B78X Datasheet - Page 71
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FDC37B78X
Manufacturer Part Number
FDC37B78X
Description
Enhanced Super I/O Controller with ACPI Support/ Real Time Clock and Consumer IR
Manufacturer
SMSC Corporation
Datasheet
1.FDC37B78X.pdf
(258 pages)
- Current page: 71 of 258
- Download datasheet (2Mb)
The chip incorporates two full function UARTs.
They are compatible with the NS16450, the
16450 ACE registers and the NS16C550A. The
UARTS perform serial-to-parallel conversion on
received
conversion on transmit characters.
rates are independently programmable from
460.8K baud down to 50 baud. The character
options are programmable for 1 start; 1, 1.5 or 2
stop bits; even, odd, sticky or no parity; and
prioritized interrupts. The UARTs each contain a
programmable baud rate generator that is
capable of dividing the input clock or crystal by
a number from 1 to 65535. The UARTs are also
capable of supporting the MIDI data rate. Refer
to the Configuration Registers for information on
disabling, power down and changing the base
address of the UARTs.
UART is enabled by programming OUT2 of that
UART to a logic "1". OUT2 being a logic "0"
disables that UART's interrupt.
characters
*Note: DLAB is Bit 7 of the Line Control Register
DLAB*
X
X
X
X
X
X
X
0
0
0
1
1
and
A2
0
0
0
0
0
0
1
1
1
1
0
0
The interrupt from a
TABLE 33 - ADDRESSING THE SERIAL PORT
parallel-to-serial
A1
0
0
0
1
1
1
0
0
1
1
0
0
The second
SERIAL PORT (UART)
The data
A0
0
0
1
0
0
1
0
1
0
1
0
1
71
Receive Buffer (read)
Transmit Buffer (write)
Interrupt Enable (read/write)
Interrupt Identification (read)
FIFO Control (write)
Line Control (read/write)
Modem Control (read/write)
Line Status (read/write)
Modem Status (read/write)
Scratchpad (read/write)
Divisor LSB (read/write)
Divisor MSB (read/write
UART also supports IrDA 1.0, HP-SIR, ASK-IR
and Consumer IR infrared modes of operation.
Note: The UARTs may be configured to share
an interrupt. Refer to the Configuration section
for more information.
REGISTER DESCRIPTION
Addressing of the accessible registers of the
Serial Port is shown below. The configuration
registers (see Configuration section) define the
base addresses of the serial ports. The Serial
Port registers are located at sequentially
increasing
addresses. The chip contains two serial ports,
each of which contain a register set as
described below.
REGISTER NAME
addresses
above
these
base
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