FDC37B78X SMSC Corporation, FDC37B78X Datasheet - Page 195

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FDC37B78X

Manufacturer Part Number
FDC37B78X
Description
Enhanced Super I/O Controller with ACPI Support/ Real Time Clock and Consumer IR
Manufacturer
SMSC Corporation
Datasheet
Auxiliary I/O, Logical Device 8
Soft Power Enable
Register 1
Default = 0x00
on Vbat POR
TABLE 83 - AUXILLIARY I/O, LOGICAL DEVICE 8 [LOGICAL DEVICE NUMBER = 0X08]
NAME
0xB0 R/W
INDEX
REG
The following bits are the enables for the wake-up
function of the nPowerOn bit. When enabled,
these bits allow their corresponding function to
turn on power to the system.
1 = ENABLED
0 = DISABLED
Bit[0] SP_RI1: UART 1 Ring Indicator Pin
Bit[1] SP_RI2: UART 2 Ring Indicator Pin
Bit[2] SP_KCLK: Keyboard Clock pin
Bit[3] SP_MCLK: Mouse Clock pin
Bit[4] SP_GPINT1: Group Interrupt 1
Bit[5] SP_GPINT2: Group Interrupt 2
Bit[6] SP_IRRX2: IRRX2 input pin
Bit[7] SP_RTC ALARM: RTC Alarm
195
DEFINITION
STATE
C

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