FDC37B78X SMSC Corporation, FDC37B78X Datasheet - Page 70

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FDC37B78X

Manufacturer Part Number
FDC37B78X
Description
Enhanced Super I/O Controller with ACPI Support/ Real Time Clock and Consumer IR
Manufacturer
SMSC Corporation
Datasheet
LOCK
In order to protect systems with long DMA
latencies against older application software that
can disable the FIFO the LOCK Command has
been added.
used by the FDC routines, and application
software should refrain from using it.
application calls for the FIFO to be disabled
then the CONFIGURE command should be
used.
The LOCK command defines whether the
EFIFO, FIFOTHR, and PRETRK parameters of
the CONFIGURE command can be RESET by
the DOR and DSR registers. When the LOCK
bit is set to logic "1" all subsequent "software
RESETS by the DOR and DSR registers will not
change the previously set parameters to their
default values. All "hardware" RESET from the
RESET pin will set the LOCK bit to logic "0" and
return the EFIFO, FIFOTHR, and PRETRK to
their default values. A status byte is returned
immediately after issuing a LOCK command.
This byte reflects the value of the LOCK bit set
by the command byte.
ENHANCED DUMPREG
The DUMPREG command is designed to
support
application software development and debug.
To accommodate the LOCK command and the
system
This command should only be
run-time
diagnostics
If an
and
70
enhanced PERPENDICULAR MODE command
the eighth byte of the DUMPREG command has
been modified to contain the additional data
from these two commands.
COMPATIBILITY
This
compatibility in mind. It is a fully backwards-
compatible solution with the older generation
765A/B
implements on-board registers for compatibility
with the PS/2, as well as PC/AT and PC/XT,
floppy disk controller subsystems. After a
hardware reset of the FDC, all registers,
functions and enhancements default to a PC/AT,
PS/2 or PS/2 Model 30 compatible operating
mode, depending on how the IDENT and MFM
bits are configured by the system BIOS.
Force Write Protect
The Force Write Protect function forces the FDD
nWRTPRT input active if the FORCE WRTPRT
bit is active. The Force Write Protect function
applies to the nWRTPRT pin in the FDD
Interface as well as the nWRTPRT pin in the
Parallel Port FDC.
Register L8CR_C5 for more information.
chip
disk
was
controllers.
designed
Refer to Configuration
The
with
FDC
software
also

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