FDC37B78X SMSC Corporation, FDC37B78X Datasheet - Page 4

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FDC37B78X

Manufacturer Part Number
FDC37B78X
Description
Enhanced Super I/O Controller with ACPI Support/ Real Time Clock and Consumer IR
Manufacturer
SMSC Corporation
Datasheet
CONFIGURATION............................................................................................................169
CONFIGURATION REGISTERS.......................................................................................172
OPERATIONAL DESCRIPTION .......................................................................................218
SYSTEM ELEMENTS....................................................................................................169
MAXIMUM GUARANTEED RATINGS ...........................................................................218
DC ELECTRICAL CHARACTERISTICS ........................................................................218
AC TIMING DIAGRAMS ................................................................................................224
ACPI REGISTERS .....................................................................................................157
Entering the Configuration State.................................................................................170
Exiting the Configuration State...................................................................................170
CONFIGURATION SEQUENCE ................................................................................170
Chip Level (Global) Control/Configuration Registers [0x00-0x2F] ...............................176
Logical Device Configuration/Control Registers [0x30-0xFF] ......................................180
Logical Device Registers............................................................................................180
I/O Base Address Configuration Register ...................................................................182
Interrupt Select Configuration Register.......................................................................184
DMA Channel Select Configuration Register ..............................................................185
SMSC Defined Logical Device Configuration Registers..............................................187
Parallel Port, Logical Device 3 ...................................................................................189
Serial Port 1, Logical Device 4 ...................................................................................190
Serial Port 2, Logical Device 5 ...................................................................................192
RTC, Logical Device 6 ...............................................................................................193
KYBD, Logical Device 7 .............................................................................................194
Auxiliary I/O, Logical Device 8 ...................................................................................195
ACPI, Logical Device A ..............................................................................................217
CAPACITIVE LOADING.............................................................................................224
IOW Timing Port 92 ...................................................................................................225
POWER-UP TIMING..................................................................................................226
Button Timing.............................................................................................................227
ROM INTERFACE .....................................................................................................228
ISA WRITE ................................................................................................................229
ISA READ ..................................................................................................................230
8042 CPU ..................................................................................................................232
CLOCK TIMING .........................................................................................................233
Burst Transfer DMA Timing........................................................................................236
DISK DRIVE TIMING .................................................................................................238
SERIAL PORT ...........................................................................................................239
Parallel Port ...............................................................................................................240
EPP 1.9 Data or Address Write Cycle ........................................................................241
EPP 1.9 Data or Address Read Cycle.........................................................................243
EPP 1.7 Data Or Address Write Cycle........................................................................245
EPP 1.7 Data or Address Read Cycle.........................................................................247
ECP PARALLEL PORT TIMING.................................................................................249
Serial Port Infrared Timing .........................................................................................254
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