LM3S6611-IQC20-A0T ETC2 [List of Unclassifed Manufacturers], LM3S6611-IQC20-A0T Datasheet - Page 5

• Manufacturer Part Number: LM3S6611-IQC20-A0T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

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10.1
10.2
10.2.1 GPTM Reset Conditions .......................................................................................................... 196
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 196
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 198
10.3
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 202
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 203
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 203
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 204
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 204
10.3.6 16-Bit PWM Mode ................................................................................................................... 205
10.4
10.5
11
11.1
11.2
11.3
11.4
11.5
12
12.1
12.2
12.2.1 Transmit/Receive Logic ........................................................................................................... 255
12.2.2 Baud-Rate Generation ............................................................................................................. 256
12.2.3 Data Transmission .................................................................................................................. 257
12.2.4 Serial IR (SIR) ......................................................................................................................... 257
12.2.5 FIFO Operation ....................................................................................................................... 258
12.2.6 Interrupts ................................................................................................................................ 258
12.2.7 Loopback Operation ................................................................................................................ 259
12.2.8 IrDA SIR block ........................................................................................................................ 259
12.3
12.4
12.5
13
13.1
13.2
13.2.1 Bit Rate Generation ................................................................................................................. 296
13.2.2 FIFO Operation ....................................................................................................................... 296
13.2.3 Interrupts ................................................................................................................................ 296
13.2.4 Frame Formats ....................................................................................................................... 297
13.3
13.4
13.5
14
14.1
October 09, 2007
General-Purpose Timers ................................................................................................. 195
Block Diagram ........................................................................................................................ 196
Functional Description ............................................................................................................. 196
Initialization and Configuration ................................................................................................. 202
Register Map .......................................................................................................................... 205
Register Descriptions .............................................................................................................. 206
Watchdog Timer ............................................................................................................... 231
Block Diagram ........................................................................................................................ 231
Functional Description ............................................................................................................. 231
Initialization and Configuration ................................................................................................. 232
Register Map .......................................................................................................................... 232
Register Descriptions .............................................................................................................. 233
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 254
Block Diagram ........................................................................................................................ 255
Functional Description ............................................................................................................. 255
Initialization and Configuration ................................................................................................. 259
Register Map .......................................................................................................................... 260
Register Descriptions .............................................................................................................. 261
Synchronous Serial Interface (SSI) ................................................................................ 295
Block Diagram ........................................................................................................................ 295
Functional Description ............................................................................................................. 295
Initialization and Configuration ................................................................................................. 304
Register Map .......................................................................................................................... 305
Register Descriptions .............................................................................................................. 306
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 332
2
C) Interface ............................................................................ 332
Preliminary
LM3S6611 Microcontroller
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