LM3S6611-IQC20-A0T ETC2 [List of Unclassifed Manufacturers], LM3S6611-IQC20-A0T Datasheet - Page 10

• Manufacturer Part Number: LM3S6611-IQC20-A0T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Table of Contents
List of Tables
Table 1.
Table 3-1.
Table 4-1.
Table 4-2.
Table 5-1.
Table 5-2.
Table 6-1.
Table 7-1.
Table 8-1.
Table 8-2.
Table 8-3.
Table 9-1.
Table 9-2.
Table 9-3.
Table 10-1.
Table 10-2.
Table 11-1.
Table 12-1.
Table 13-1.
Table 14-1.
Table 14-2.
Table 14-3.
Table 15-1.
Table 15-2.
Table 16-1.
Table 16-2.
Table 16-3.
Table 16-4.
Table 18-1.
Table 18-2.
Table 18-3.
Table 18-4.
Table 19-1.
Table 19-2.
Table 20-1.
Table 20-2.
Table 20-3.
Table 20-4.
Table 20-5.
Table 20-6.
Table 20-7.
Table 20-8.
Table 20-9.
Table 20-10. Analog Comparator Voltage Reference Characteristics .................................................... 443
Table 20-11.
Table 20-12. 100BASE-TX Transmitter Characteristics ........................................................................ 444
10
Documentation Conventions ............................................................................................ 18
Memory Map ................................................................................................................... 39
Exception Types .............................................................................................................. 41
Interrupts ........................................................................................................................ 42
JTAG Port Pins Reset State ............................................................................................. 45
JTAG Instruction Register Commands ............................................................................... 50
System Control Register Map ........................................................................................... 60
Hibernation Module Register Map ................................................................................... 117
Flash Protection Policy Combinations ............................................................................. 133
Flash Resident Registers ............................................................................................... 134
Flash Register Map ........................................................................................................ 134
GPIO Pad Configuration Examples ................................................................................. 158
GPIO Interrupt Configuration Example ............................................................................ 158
GPIO Register Map ....................................................................................................... 159
16-Bit Timer With Prescaler Configurations ..................................................................... 199
Timers Register Map ...................................................................................................... 205
Watchdog Timer Register Map ........................................................................................ 232
UART Register Map ....................................................................................................... 260
SSI Register Map .......................................................................................................... 306
Examples of I
Inter-Integrated Circuit (I
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 349
TX & RX FIFO Organization ........................................................................................... 371
Ethernet Register Map ................................................................................................... 374
Comparator 0 Operating Modes ..................................................................................... 412
Comparator 1 Operating Modes ...................................................................................... 413
Internal Reference Voltage and ACREFCTL Field Values ................................................. 413
Analog Comparators Register Map ................................................................................. 415
Signals by Pin Number ................................................................................................... 424
Signals by Signal Name ................................................................................................. 428
Signals by Function, Except for GPIO ............................................................................. 432
GPIO Pins and Alternate Functions ................................................................................. 436
Temperature Characteristics ........................................................................................... 438
Thermal Characteristics ................................................................................................. 438
Maximum Ratings .......................................................................................................... 439
Recommended DC Operating Conditions ........................................................................ 439
LDO Regulator Characteristics ....................................................................................... 440
Detailed Power Specifications ........................................................................................ 441
Flash Memory Characteristics ........................................................................................ 442
Phase Locked Loop (PLL) Characteristics ....................................................................... 442
Clock Characteristics ..................................................................................................... 442
Crystal Characteristics ................................................................................................... 443
Analog Comparator Characteristics ................................................................................. 443
I
2
C Characteristics ......................................................................................................... 443
2
C Master Timer Period versus Speed Mode ............................................... 335
2
C) Interface Register Map ......................................................... 344
Preliminary
October 09, 2007