LM3S6611-IQC20-A0T ETC2 [List of Unclassifed Manufacturers], LM3S6611-IQC20-A0T Datasheet - Page 384
LM3S6611-IQC20-A0T
Manufacturer Part Number
LM3S6611-IQC20-A0T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S6611-IQC20-A0T.pdf
(477 pages)
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Ethernet Controller
Ethernet MAC Individual Address 0 (MACIA0)
Base 0x4004.8000
Offset 0x014
Type R/W, reset 0x0000.0000
384
Reset
Reset
Type
Type
Bit/Field
31:24
23:16
15:8
7:0
R/W
R/W
31
15
0
0
Register 7: Ethernet MAC Individual Address 0 (MACIA0), offset 0x014
This register enables software to program the first four bytes of the hardware MAC address of the
Network Interface Card (NIC). (The last two bytes are in MACIA1). The 6-byte IAR is compared
against the incoming Destination Address fields to determine whether the frame should be received.
R/W
R/W
30
14
0
0
MACOCT4
MACOCT3
MACOCT2
MACOCT1
Name
R/W
R/W
29
13
0
0
R/W
R/W
28
12
0
0
MACOCT4
MACOCT2
R/W
R/W
Type
27
11
R/W
R/W
R/W
R/W
0
0
R/W
R/W
26
10
0
0
Reset
0x0
0x0
0x0
0x0
R/W
R/W
25
0
9
0
Preliminary
Description
MAC Address Octet 4
The MACOCT4 bits represent the fourth octet of the MAC address used
to uniquely identify each Ethernet Controller.
MAC Address Octet 3
The MACOCT3 bits represent the third octet of the MAC address used
to uniquely identify each Ethernet Controller.
MAC Address Octet 2
The MACOCT2 bits represent the second octet of the MAC address used
to uniquely identify each Ethernet Controller.
MAC Address Octet 1
The MACOCT1 bits represent the first octet of the MAC address used to
uniquely identify each Ethernet Controller.
R/W
R/W
24
0
8
0
R/W
R/W
23
0
7
0
R/W
R/W
22
0
6
0
R/W
R/W
21
0
5
0
R/W
R/W
20
0
4
0
MACOCT3
MACOCT1
R/W
R/W
19
0
3
0
R/W
R/W
18
0
2
0
October 09, 2007
R/W
R/W
17
0
1
0
R/W
R/W
16
0
0
0
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