LM3S6611-IQC20-A0T ETC2 [List of Unclassifed Manufacturers], LM3S6611-IQC20-A0T Datasheet - Page 413

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LM3S6611-IQC20-A0T

Manufacturer Part Number
LM3S6611-IQC20-A0T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
16.2.1
October 09, 2007
Table 16-2. Comparator 1 Operating Modes
a. C1o and C1+ signals share a single pin and may only be used as one or the other.
Internal Reference Programming
The structure of the internal reference is shown in Figure 16-3 on page 413. This is controlled by a
single configuration register (ACREFCTL). Table 16-3 on page 413 shows the programming options
to develop specific internal reference values, to compare an external voltage against a particular
voltage generated internally.
Figure 16-3. Comparator Internal Reference Structure
VREF
Table 16-3. Internal Reference Voltage and ACREFCTL Field Values
ACCNTL1
ASRCP
00
01
10
11
ACREFCTL Register
EN Bit Value
RNG
EN
EN=0
AVDD
Comparator 1
VIN-
C1-
C1-
C1-
C1-
RNG Bit Value
VIN+
C1o/C1+
reserved
RNG=X
C0+
Vref
8R
a
Output
C1o/C1+
C1o/C1+
C1o/C1+
C1o/C1+
Output Reference Voltage Based on VREF Field Value
0 V (GND) for any value of VREF; however, it is recommended that RNG=1 and VREF=0
for the least noisy ground reference.
R
Interrupt
15
R
yes
yes
yes
yes
Preliminary
14
Decoder
R
1
R
0
8R
LM3S6611 Microcontroller
internal
reference
413

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