MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 47

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

1.7.2.21.2
This signal is associated with the transmit functionality of the scalable controller area network controller
(MSCAN).
1.7.2.22
The signals PWM[7:0] are associated with the PWM module outputs.
1.7.2.23
1.7.2.23.1
This signal is associated with the output of the divided bus clock (ECLK).
1.7.2.23.2
This signal is associated with the output of twice the bus clock (ECLKX2).
1.7.2.23.3
This signal is associated with the output of the API clock (API_EXTCLK).
1.7.2.24
The signals IOC[7:0] are associated with the input capture or output compare functionality of the timer
(TIM) module.
1.7.2.25
This signal is associated with the maskable IRQ interrupt.
1.7.2.26
This signal is associated with the non-maskable XIRQ interrupt.
1.7.2.27
These signals are inputs to the Analog-to-Digital Converter. Their purpose is to trigger ADC conversions.
Freescale Semiconductor
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
PWM[7:0] Signals
Internal Clock outputs
IOC[7:0] Signals
IRQ
XIRQ
ETRIG[3:0]
TXCAN Signal
ECLK
This feature is only intended for debug purposes at room temperature.
It must not be used for clocking external devices in an application.
ECLKX2
This feature is only intended for debug purposes at room temperature.
It must not be used for clocking external devices in an application.
API_EXTCLK
MC9S12G Family Reference Manual, Rev.1.01
NOTE
NOTE
Device Overview MC9S12G-Family
47