MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 409

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

12.3.2.6
Writes to this register will abort current conversion sequence and start a new conversion sequence. If the
external trigger function is enabled (ETRIGE=1) an initial write to ATDCTL5 is required to allow starting
of a conversion sequence which will then occur on each trigger event. Start of conversion means the
beginning of the sampling phase.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0005
SMP[2:0]
PRS[4:0]
Reset
Field
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
7–5
4–0
W
R
Sample Time Select — These three bits select the length of the sample time in units of ATD conversion clock
cycles. Note that the ATD conversion clock period is itself a function of the prescaler value (bits PRS4-0).
Table 12-13
ATD Clock Prescaler — These 5 bits are the binary prescaler value PRS. The ATD conversion clock frequency
is calculated as follows:
Refer to Device Specification for allowed frequency range of f
ATD Control Register 5 (ATDCTL5)
0
0
7
= Unimplemented or Reserved
lists the available sample time lengths.
f ATDCLK
SMP2
SC
0
6
0
0
0
0
1
1
1
1
Figure 12-8. ATD Control Register 5 (ATDCTL5)
Table 12-12. ATDCTL4 Field Descriptions
MC9S12G Family Reference Manual, Rev.1.01
=
------------------------------------ -
2
SMP1
SCAN
×
Table 12-13. Sample Time Select
(
0
0
1
1
0
0
1
1
5
0
f BUS
PRS
+
1
)
SMP0
MULT
0
1
0
1
0
1
0
1
0
4
Description
ATD Clock Cycles
CD
0
3
Sample Time
in Number of
ATDCLK
10
12
16
20
24
4
6
8
.
Analog-to-Digital Converter (ADC10B12CV2)
CC
2
0
CB
0
1
CA
0
0
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