MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 404

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MC9S12G

Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Analog-to-Digital Converter (ADC10B12CV2)
404
ETRIGCH[3:0]
SMP_DIS
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Field
3–0
4
1
ETRIGSEL
Only if ETRIG3-0 input option is available (see device specification), else ETRISEL is ignored, that means
external trigger source is still on one of the AD channels selected by ETRIGCH3-0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
Discharge Before Sampling Bit
0 No discharge before sampling.
1 The internal sample capacitor is discharged before sampling the channel. This adds 2 ATD clock cycles to
External Trigger Channel Select — These bits select one of the AD channels or one of the ETRIG3-0 inputs
as source for the external trigger. The coding is summarized in
the sampling time. This can help to detect an open circuit instead of measuring the previous sampled
channel.
ETRIGCH3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
Table 12-3. ATDCTL1 Field Descriptions (continued)
Table 12-5. External Trigger Channel Select Coding
SRES1
0
0
1
1
ETRIGCH2
MC9S12G Family Reference Manual,
Table 12-4. A/D Resolution Coding
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
SRES0
0
1
0
1
ETRIGCH1
X
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Description
ETRIGCH0
A/D Resolution
X
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
10-bit data
Reserved
8-bit data
Rev.1.01
Table
12-5.
External trigger source is
Reserved
Reserved
ETRIG0
ETRIG1
ETRIG2
ETRIG3
AN10
AN11
AN11
AN11
AN11
AN11
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
Freescale Semiconductor
1
1
1
1

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