MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 195

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

1
1
2.4.3.44
2.4.3.45
Freescale Semiconductor
Address 0x026A (G1, G2)
Address 0x026A (G3)
Address 0x026C (G1, G2)
Address 0x026C (G3)
Read: Anytime
Write: Anytime
Read: Anytime
Write: Anytime
DDRJ
Field
Reset
Reset
Reset
Reset
7-0
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
W
W
W
W
R
R
R
R
Port J data direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
DDRJ7
PERJ7
Port J Data Direction Register (DDRJ)
0
0
0
Port J Pull Device Enable Register (PERJ)
1
0
0
7
7
7
7
DDRJ6
PERJ6
0
0
0
1
0
0
Figure 2-45. Port J Pull Device Enable Register (PERJ)
6
6
6
6
Figure 2-44. Port J Data Direction Register (DDRJ)
Table 2-71. DDRJ Register Field Descriptions
MC9S12G Family Reference Manual, Rev.1.01
DDRJ5
PERJ5
0
0
0
1
0
0
5
5
5
5
DDRJ4
PERJ4
0
0
0
1
0
0
4
4
4
4
Description
DDRJ3
DDRJ3
PERJ3
PERJ3
0
0
1
1
3
3
3
3
DDRJ2
DDRJ2
PERJ2
PERJ2
2
0
2
0
2
1
2
1
Port Integration Module (S12GPIMV0)
DDRJ1
DDRJ1
PERJ1
PERJ1
Access: User read/write
Access: User read/write
Access: User read/write
Access: User read/write
0
0
1
1
1
1
1
1
DDRJ0
DDRJ0
PERJ0
PERJ0
0
0
1
1
0
0
0
0
195
1
1
1
1