MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 234

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

S12G Memory Map Controller (S12GMMCV1)
5.1.3
The main features of this block are:
5.1.4
The S12GMMC selects the MCU’s functional mode. It also determines the devices behavior in secured
and unsecured state.
5.1.4.1
Two functional modes are implemented on devices of the S12G product family:
5.1.4.2
S12G devices can be secured to prohibit external access to the on-chip flash. The S12GMMC module
determines the access permissions to the on-chip memories in secured and unsecured state.
5.1.5
Figure 5-1
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This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Paging capability to support a global 256 KByte memory address space
Bus arbitration between the masters CPU12, S12SBDM to different resources.
MCU operation mode control
MCU security control
Generation of system reset when CPU12 accesses an unimplemented address (i.e., an address
which does not belong to any of the on-chip modules) in single-chip modes
Normal Single Chip (NS)
The mode used for running applications.
Special Single Chip Mode (SS)
A debug mode which causes the device to enter BDM Active Mode after each reset. Peripherals
may also provide special debug features in this mode.
shows a block diagram of the S12GMMC.
Features
Modes of Operation
Block Diagram
Functional Modes
Security
MC9S12G Family Reference Manual,
Rev.1.01
Freescale Semiconductor