FDC37B72X_07 SMSC [SMSC Corporation], FDC37B72X_07 Datasheet - Page 232

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FDC37B72X_07

Manufacturer Part Number
FDC37B72X_07
Description
128 Pin Enhanced Super I/O Controller with ACPI Support
Manufacturer
SMSC [SMSC Corporation]
Datasheet
SERIAL PORT INFRARED TIMING
IRDA SIR RECEIVE
1. Receive Pulse Detection Criteria: A received pulse is considered
2. IRRX:
n IRRX
IRRX
DATA
t1
t1
t1
t1
t1
t1
t1
t2
t2
t2
t2
t2
t2
t2
received pulse is a minimum of 1 41µs
nIRRX: L5, CRF1 Bit 0 = 0
Pulse Width at
Pulse Width at
Pulse Width at
Pulse Width at
Pulse Width at
Pulse Width at
Pulse Width at
Bit Time at
Bit Time at
Bit Time at
Bit Time at
Bit Time at
Bit Time at
Bit Time at
L5, CRF1 Bit 0
0
t2
t1
FIGURE 31 - IRDA SIR RECEIVE TIMING
1
t2
Parameter
t1
0
1
233
0
0
min
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1
3.22
19.5
8.68
17.4
104
208
416
typ
1.6
4.8
9.7
39
78
26
52
1
max
11.07
22.13
44.27
88.55
2.71
3.69
5.53
0
1
units
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
1

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