FDC37B72X_07 SMSC [SMSC Corporation], FDC37B72X_07 Datasheet - Page 21

• Manufacturer Part Number: FDC37B72X_07
• Description: 128 Pin Enhanced Super I/O Controller with ACPI Support
• Manufacturer: SMSC [SMSC Corporation]

TAPE DRIVE REGISTER (TDR)
Address 3F3 READ/WRITE
The
Register (TDR) is included for 82077 software
compatibility and allows the user to assign tape
support to a particular drive during initialization.
Any future references to that drive automatically
invokes tape support. The TDR Tape Select bits
TDR.[1:0] determine the tape drive number.
Bit 7
Bit 7
X
X
X
X
X
X
1
0
1
0
DIGITAL OUTPUT REGISTER
DIGITAL OUTPUT REGISTER
Tape
Bit 6
Bit 6
X
X
X
X
X
X
1
0
1
0
TABLE 9 - INTERNAL 2 DRIVE DECODE - DRIVES 0 AND 1 SWAPPED
Bit 5
Bit 5
Drive
X
X
X
X
X
X
1
0
1
0
Bit 4
Bit 4
TABLE 8 - INTERNAL 2 DRIVE DECODE - NORMAL
X
X
X
X
X
X
0
1
0
1
TAPE SEL1
(TDR.1)
Bit1
Bit1
X
X
0
0
1
1
0
0
1
1
0
0
1
1
TABLE 7 - TAPE SELECT BITS
Bit 0
Bit 0
X
X
0
1
0
1
0
1
0
1
DRIVE SELECT OUTPUTS
OUTPUTS (ACTIVE LOW)
TAPE SEL0
(TDR.0)
nDS1
nDS1
21
DRIVE SELECT
0
1
0
1
0
1
1
1
1
1
0
1
1
1
(ACTIVE LOW)
Tape Select Bit encoding. Note that drive 0 is the
boot device and cannot be assigned tape support.
The remaining Tape Drive Register bits TDR.[7:2]
are tristated when read. The TDR is unaffected by
a software reset.
SELECTED
nDS0
nDS0
1
0
1
1
1
DRIVE
0
1
1
1
1
None
1
2
3
MOTOR ON OUTPUTS
nMTR1
MOTOR ON OUTPUTS
nBIT 4
nBIT 4
nBIT 4
nBIT 4
nBIT 4
nMTR1
nBIT 5
nBIT 5
nBIT 5
nBIT 5
nBIT 5
(ACTIVE LOW)
TABLE 7 illustrates the
(ACTIVE LOW)
nMTR0
nBIT 5
nBIT 5
nBIT 5
nBIT 5
nBIT 5
nMTR0
nBIT 4
nBIT 4
nBIT 4
nBIT 4
nBIT 4