FDC37B72X_07 SMSC [SMSC Corporation], FDC37B72X_07 Datasheet - Page 173

• Manufacturer Part Number: FDC37B72X_07
• Description: 128 Pin Enhanced Super I/O Controller with ACPI Support
• Manufacturer: SMSC [SMSC Corporation]

Note A. Logical Device IRQ and DMA Operation
1)
2)
3)
4)
1)
Serial Port 1 and 2: Modem Control Register (MCR) Bit D2 (OUT2) - When OUT2 is a logic "0", the
serial port interrupt is forced to a high impedance state - disabled.
Parallel Port: SPP and EPP modes: Control Port (Base+2) bit D4 (IRQE) set to "0", IRQ is disabled
(high impedance).
Keyboard Controller: Refer to the KBD section of this spec.
register bit in that logical block, the IRQ and/or DACK must be disabled. This is in addition to the
IRQ and DACK disabled by the Configuration Registers (active bit or address not valid).
impedance). Will not respond to the DREQ
IRQ and DMA Enable and Disable: Any time the IRQ or DACK for a logical block is disabled by a
FDC: For the following cases, the IRQ and DACK used by the FDC are disabled (high
(a)
(b)
1)
ECP Mode:
(FROM ECR REGISTER)
000
001
010
011
100
101
110
111
Digital Output Register (Base+2) bit D3 (DMAEN) set to "0".
The FDC is in power down (disabled).
(a)
(b)
MODE
(DMA) dmaEn from ecr register. See table.
IRQ - See table.
PRINTER
CONFIG
TEST
FIFO
ECP
RES
SPP
EPP
CONTROLLED BY
174
IRQ PIN
IRQE
IRQE
IRQE
IRQE
IRQE
(on)
(on)
(on)
CONTROLLED BY
PDREQ PIN
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn