FDC37B72X_07 SMSC [SMSC Corporation], FDC37B72X_07 Datasheet - Page 177

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FDC37B72X_07

Manufacturer Part Number
FDC37B72X_07
Description
128 Pin Enhanced Super I/O Controller with ACPI Support
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Serial Port 1, Logical Device 4
Note 1: To properly share and IRQ,
UART IRQ pins will assert when either UART generates an interrupt.
Note: If both UARTs are configured to use different IRQ pins and the share IRQ bit is set, then both of the
Serial Port 1
Mode Register
Default = 0x00
on Vcc POR or
Reset_Drv
1. Configure UART1 (or UART2) to use the desired IRQ pin.
2. Configure UART2 (or UART1) to use No IRQ selected.
3. Set the share IRQ bit.
NAME
Table 70 - Serial Port 1, Logical Device 4 [Logical Device Number = 0x04]
REG INDEX
0xF0 R/W
Bit[0] MIDI Mode
= 0
= 1
Bit[1] High Speed
= 0
= 1
Bit[6:2] Reserved, set to zero
Bit[7]: Share IRQ
=0 UARTS use different IRQs
=1 UARTS share a common IRQ
See Note 1 below.
178
MIDI support disabled (default)
MIDI support enabled
High Speed Disabled(default)
High Speed Enabled
DEFINITION
STATE
C

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