LAN9115_05 SMSC [SMSC Corporation], LAN9115_05 Datasheet - Page 88

• Manufacturer Part Number: LAN9115_05
• Description: Highly Efficient Single- Chip 10/100 Non-PCI Ethernet Controller
• Manufacturer: SMSC [SMSC Corporation]

Revision 1.1 (05-17-05)
5.3.15
31-30
28-16
BITS
Bits
15-0
[22]
2:0
29
0
0
0
0
1
1
1
1
DESCRIPTION
Reserved
GP Timer Enable (TIMER_EN). When a one is written to this bit the GP
Timer is put into the run state. When cleared, the GP Timer is halted. On
the 1 to 0 transition of this bit the GPT_LOAD field will be preset to FFFFh.
Reserved
General Purpose Timer Pre-Load (GPT_LOAD). This value is pre-loaded
into the GP-Timer.
GPIO Data 0-2 (GPIODn). When enabled as an output, the value written is
reflected on GPIOn. When read, GPIOn reflects the current state of the
corresponding GPIO pin.
GPIO0 – bit 0
GPIO1 – bit 1
GPIO2 – bit 2
GPT_CFG-General Purpose Timer Configuration Register
This register configures the General Purpose timer. The GP Timer can be configured to generate host
interrupts at intervals defined in this register.
[21]
0
0
1
1
0
0
1
1
Offset:
[20]
0
1
0
1
0
1
0
1
Table 5.4 EEPROM Enable Bit Definitions
Description
8Ch
EEDIO FUNCTION
DATASHEET
TX_CLK
TX_EN
TX_EN
EEDIO
GPO3
GPO3
88
Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Size:
Reserved
Reserved
32 bits
EECLK FUNCTION
TYPE
RX_CLK
R/W
R/W
EECLK
RX_DV
RX_DV
RO
RO
GPO4
GPO4
Type
R/W
SMSC LAN9115
DEFAULT
FFFFh
Default
Datasheet
0
-
-
000