LAN9115_05 SMSC [SMSC Corporation], LAN9115_05 Datasheet - Page 124

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LAN9115_05

Manufacturer Part Number
LAN9115_05
Description
Highly Efficient Single- Chip 10/100 Non-PCI Ethernet Controller
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Revision 1.1 (05-17-05)
6.8
6.9
T6.1
T6.2
T6.3
T6.4
PARAMETER
The following specifies the EEPROM timing requirements for the LAN9115
Reset Timing
EEPROM Timing
Reset Pulse Width
Configuration input setup to
nRST rising
Configuration input hold after
nRST rising
Output Drive after nRST rising
nRST
Configuration
signals
Output drive
DESCRIPTION
Figure 6.7 EEPROM Timing
Table 6.9 Reset Timing
T6.1
DATASHEET
T6.2
124
MIN
200
200
10
Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
T6.3
T6.4
TYP
MAX
16
UNITS
us
ns
ns
ns
NOTES
SMSC LAN9115
Datasheet

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