LAN9115_05 SMSC [SMSC Corporation], LAN9115_05 Datasheet - Page 85

no-image

LAN9115_05

Manufacturer Part Number
LAN9115_05
Description
Highly Efficient Single- Chip 10/100 Non-PCI Ethernet Controller
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9115
5.3.12
5.3.13
BITS
31-24
23-16
13-12
31:14
BITS
15-0
10
11
DESCRIPTION
Reserved
TX Status FIFO Used Space (TXSUSED). Indicates the amount of space
in DWORDS used in the TX Status FIFO.
TX Data FIFO Free Space (TDFREE). Reads the amount of space in bytes,
available in the TX data FIFO. The application should never write more data
than is available, as indicated by this value.
DESCRIPTION
RESERVED
Power Management Mode (PM_MODE)
the appropriate Power Management mode. Special care must be taken when
modifying these bits.
Encoding:
00b – D0 (normal operation)
01b – D1 (wake-up frame and magic packet detection are enabled)
10b – D2 (can perform energy detect)
11b – RESERVED - Do not set in this mode
Note:
RESERVED
PHY Reset (PHY_RST) – Writing a ‘1’ to this bit resets the PHY. The internal
logic automatically holds the PHY reset for a minimum of 100us. When the
PHY is released from reset, this bit is automatically cleared. All writes to this
bit are ignored while this bit is high.
TX_FIFO_INF—Transmit FIFO Information Register
This register contains the free space in the transmit data FIFO and the used space in the transmit
status FIFO in the LAN9115.
PMT_CTRL— Power Management Control Register
This register controls the Power Management features. This register can be read while the
LAN9115
Note: The LAN9115 must always be read at least once after power-up, reset, or upon return from a
Offset:
Offset:
When the LAN9115 is in a any of the reduced power modes, a write
of any data to the BYTE_TEST register will wake-up the device. DO
NOT PERFORM WRITES TO OTHER ADDRRESSES while the
READY bit in this register is cleared.
power-saving state or write operations will not function.
is in a power saving mode.
80h
84h
DATASHEET
These bits set the LAN9115 into
85
Size:
Size:
32 bits
32 bits
TYPE
TYPE
RO
RO
RO
RO
RO
SC
SC
Revision 1.1 (05-17-05)
DEFAULT
DEFAULT
1200h
00h
00b
-
0b
-
-

Related parts for LAN9115_05