CY7C1480V33_11 CYPRESS [Cypress Semiconductor], CY7C1480V33_11 Datasheet - Page 4

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CY7C1480V33_11

Manufacturer Part Number
CY7C1480V33_11
Description
72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined Sync SRAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Contents
Pin Configurations ........................................................... 5
Pin Definitions .................................................................. 8
Functional Overview ........................................................ 9
Interleaved Burst Address Table
(MODE = Floating or VDD) ............................................. 10
Linear Burst Address Table
(MODE = GND) ................................................................ 10
ZZ Mode Electrical Characteristics ............................... 10
Truth Table ...................................................................... 11
Truth Table for Read/Write ............................................ 12
Truth Table for Read/Write ............................................ 12
Truth Table for Read/Write ............................................ 13
IEEE 1149.1 Serial Boundary Scan (JTAG) .................. 14
TAP Controller State Diagram ....................................... 14
TAP Controller Block Diagram ...................................... 14
TAP Timing ...................................................................... 16
TAP AC Switching Characteristics ............................... 16
3.3 V TAP AC Test Conditions ....................................... 17
3.3 V TAP AC Output Load Equivalent ......................... 17
2.5 V TAP AC Test Conditions ....................................... 17
2.5 V TAP AC Output Load Equivalent ......................... 17
Document Number: 38-05283 Rev. *K
Single Read Accesses ................................................ 9
Single Write Accesses Initiated by ADSP ................... 9
Single Write Accesses Initiated by ADSC ................. 10
Burst Sequences ....................................................... 10
Sleep Mode ............................................................... 10
Disabling the JTAG Feature ...................................... 14
Test Access Port (TAP) ............................................. 14
PERFORMING A TAP RESET .................................. 14
TAP REGISTERS ...................................................... 14
TAP Instruction Set ................................................... 15
TAP DC Electrical Characteristics and
Operating Conditions ..................................................... 17
Identification Register Definitions ................................ 17
Scan Register Sizes ....................................................... 18
Identification Codes ....................................................... 18
Boundary Scan Exit Order (2 M × 36) ........................... 19
Boundary Scan Exit Order (4 M × 18) ........................... 19
Boundary Scan Exit Order (1 M × 72) ........................... 20
Maximum Ratings ........................................................... 21
Operating Range ............................................................. 21
Electrical Characteristics ............................................... 21
Capacitance .................................................................... 22
Thermal Resistance ........................................................ 22
AC Test Loads and Waveforms ..................................... 23
Switching Characteristics .............................................. 23
Switching Waveforms .................................................... 25
Ordering Information ...................................................... 29
Package Diagrams .......................................................... 30
Acronyms ........................................................................ 33
Document Conventions ................................................. 33
Document History Page ................................................. 34
Sales, Solutions, and Legal Information ...................... 36
Read Cycle Timing .................................................... 25
Write Cycle Timing .................................................... 26
Read/Write Cycle Timing ........................................... 27
ZZ Mode Timing ........................................................ 28
Ordering Code Definitions ......................................... 29
Units of Measure ....................................................... 33
Worldwide Sales and Design Support ....................... 36
Products .................................................................... 36
PSoC Solutions ......................................................... 36
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